Annotation of sys/arch/sparc64/dev/iommuvar.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: iommuvar.h,v 1.10 2007/05/29 09:53:59 sobrado Exp $ */
2: /* $NetBSD: iommuvar.h,v 1.9 2001/10/07 20:30:41 eeh Exp $ */
3:
4: /*
5: * Copyright (c) 2003 Henric Jungheim
6: * Copyright (c) 1999 Matthew R. Green
7: * All rights reserved.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. The name of the author may not be used to endorse or promote products
18: * derived from this software without specific prior written permission.
19: *
20: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
25: * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
26: * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
27: * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28: * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30: * SUCH DAMAGE.
31: */
32:
33: #ifndef _SPARC64_DEV_IOMMUVAR_H_
34: #define _SPARC64_DEV_IOMMUVAR_H_
35:
36: #ifndef _SYS_TREE_H_
37: #include <sys/tree.h>
38: #endif
39:
40: /*
41: * per-Streaming Buffer state
42: */
43: struct strbuf_ctl {
44: bus_space_tag_t sb_bustag; /* streaming buffer registers */
45: bus_space_handle_t sb_sb; /* Handle for our regs */
46: struct iommu_state *sb_iommu; /* Associated IOMMU */
47: /*
48: * Since implementing the per-map IOMMU state, these per-STC
49: * flush areas are not used other than as a boolean flag to indicate
50: * the presence of a working and enabled STC. For inconsistency's
51: * sake, the "sb" pointers of iommu_state are sometimes used for the
52: * same purpose. This should be consolidated.
53: */
54: paddr_t sb_flushpa; /* to flush streaming buffers */
55: volatile int64_t *sb_flush;
56: };
57:
58: /*
59: * per-map STC flush area
60: */
61: struct strbuf_flush {
62: char sbf_area[0x80]; /* Holds 64-byte long/aligned buffer */
63: void *sbf_flush; /* Kernel virtual address of buffer */
64: paddr_t sbf_flushpa; /* Physical address of buffer area */
65: };
66:
67: /*
68: * per-map DVMA page table
69: */
70: struct iommu_page_entry {
71: SPLAY_ENTRY(iommu_page_entry) ipe_node;
72: paddr_t ipe_pa;
73: vaddr_t ipe_va;
74: };
75: struct iommu_page_map {
76: SPLAY_HEAD(iommu_page_tree, iommu_page_entry) ipm_tree;
77: int ipm_maxpage; /* Size of allocated page map */
78: int ipm_pagecnt; /* Number of entries in use */
79: struct iommu_page_entry ipm_map[1];
80: };
81:
82: /*
83: * per-map IOMMU state
84: *
85: * This is what bus_dvmamap_t'c _dm_cookie should be pointing to.
86: */
87: struct iommu_map_state {
88: struct strbuf_flush ims_flush; /* flush should be first (alignment) */
89: struct strbuf_ctl *ims_sb; /* Link to parent */
90: int ims_flags;
91: struct iommu_page_map ims_map; /* map must be last (array at end) */
92: };
93: #define IOMMU_MAP_STREAM 1
94:
95: /*
96: * per-IOMMU state
97: */
98: struct iommu_state {
99: paddr_t is_ptsb; /* TSB physical address */
100: int64_t *is_tsb; /* TSB virtual address */
101: int is_tsbsize; /* 0 = 8K, ... */
102: u_int is_dvmabase;
103: u_int is_dvmaend;
104: int64_t is_cr; /* Control register value */
105: struct extent *is_dvmamap; /* DVMA map for this instance */
106:
107: struct strbuf_ctl *is_sb[2]; /* Streaming buffers if any */
108:
109: /* copies of our parents state, to allow us to be self contained */
110: bus_space_tag_t is_bustag; /* our bus tag */
111: bus_space_handle_t is_iommu; /* IOMMU registers */
112: };
113:
114: /* interfaces for PCI/SBus code */
115: void iommu_init(char *, struct iommu_state *, int, u_int32_t);
116: void iommu_reset(struct iommu_state *);
117: paddr_t iommu_extract(struct iommu_state *, vaddr_t);
118: int64_t iommu_lookup_tte(struct iommu_state *, vaddr_t);
119: int64_t iommu_fetch_tte(struct iommu_state *, paddr_t);
120: /* bus_dma_tag_t implementation functions */
121: int iommu_dvmamap_create(bus_dma_tag_t, bus_dma_tag_t, struct strbuf_ctl *,
122: bus_size_t, int, bus_size_t, bus_size_t, int, bus_dmamap_t *);
123: void iommu_dvmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t);
124: int iommu_dvmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, void *,
125: bus_size_t, struct proc *, int);
126: void iommu_dvmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t);
127: int iommu_dvmamap_load_raw(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
128: bus_dma_segment_t *, int, bus_size_t, int);
129: void iommu_dvmamap_sync(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
130: bus_addr_t, bus_size_t, int);
131: int iommu_dvmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, bus_size_t,
132: bus_size_t, bus_size_t, bus_dma_segment_t *, int, int *, int);
133: void iommu_dvmamem_free(bus_dma_tag_t, bus_dma_tag_t, bus_dma_segment_t *,
134: int);
135: int iommu_dvmamem_map(bus_dma_tag_t, bus_dma_tag_t, bus_dma_segment_t *,
136: int, size_t, caddr_t *, int);
137: void iommu_dvmamem_unmap(bus_dma_tag_t, bus_dma_tag_t, caddr_t, size_t);
138:
139: #define IOMMUREG_READ(is, reg) \
140: bus_space_read_8((is)->is_bustag, \
141: (is)->is_iommu, \
142: IOMMUREG(reg))
143:
144: #define IOMMUREG_WRITE(is, reg, v) \
145: bus_space_write_8((is)->is_bustag, \
146: (is)->is_iommu, \
147: IOMMUREG(reg), \
148: (v))
149:
150: #endif /* _SPARC64_DEV_IOMMUVAR_H_ */
151:
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