Annotation of sys/arch/sparc/sparc/db_disasm.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: db_disasm.c,v 1.7 2004/01/15 17:22:28 miod Exp $ */
2: /* $NetBSD: db_disasm.c,v 1.9 1996/03/31 23:45:07 pk Exp $ */
3:
4: /*
5: * Copyright (c) 1994 David S. Miller, davem@nadzieja.rutgers.edu
6: * Copyright (c) 1995 Paul Kranenburg
7: * All rights reserved.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. All advertising materials mentioning features or use of this software
18: * must display the following acknowledgement:
19: * This product includes software developed by David Miller.
20: * 4. The name of the author may not be used to endorse or promote products
21: * derived from this software without specific prior written permission
22: *
23: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33: */
34:
35: #include <sys/param.h>
36: #include <machine/db_machdep.h>
37: #include <machine/instr.h>
38: #include <ddb/db_sym.h>
39: #include <ddb/db_interface.h>
40: #include <ddb/db_extern.h>
41: #include <ddb/db_output.h>
42: #include <ddb/db_access.h>
43:
44: /*
45: * All Sparc instructions are 32-bits, with the one exception being
46: * the set instruction which is actually a macro which expands into
47: * two instructions...
48: *
49: * There are 5 different fields that can be used to identify which
50: * operation is encoded into a particular 32-bit insn. There are 3
51: * formats for instructions, which one being used is determined by
52: * bits 30-31 of the insn. Here are the bit fields and their names:
53: *
54: * 1100 0000 0000 0000 0000 0000 0000 0000 op field, determines format
55: * 0000 0001 1100 0000 0000 0000 0000 0000 op2 field, format 2 only
56: * 0000 0001 1111 1000 0000 0000 0000 0000 op3 field, format 3 only
57: * 0000 0000 0000 0000 0010 0000 0000 0000 f3i bit, format 3 only
58: */
59:
60: #define OP(x) (((x) & 0x3) << 30)
61: #define OP2(x) (((x) & 0x7) << 22)
62: #define OP3(x) (((x) & 0x3f) << 19)
63: #define OPF(x) (((x) & 0x1ff) << 5)
64: #define F3I(x) (((x) & 0x1) << 13)
65:
66: /* various other fields */
67:
68: #define A(x) (((x) & 0x1) << 29)
69: #define P(x) (((x) & 0x1) << 19)
70: #define X(x) (((x) & 0x1) << 12)
71: #define FCN(x) (((x) & 0x1f) << 25)
72: #define RCOND2(x) (((x) & 0x7) << 25)
73: #define RCOND34(x) (((x) & 0x7) << 10)
74: #define COND(x) (((x) & 0xf) << 25)
75: #define SW_TRAP(x) ((x) & 0x7f)
76: #define SHCNT32(x) ((x) & 0x1f)
77: #define SHCNT64(x) ((x) & 0x3f)
78: #define IMM11(x) ((x) & 0x7ff)
79: #define IMM22(x) ((x) & 0x3fffff)
80: #define DISP19(x) ((x) & 0x7ffff)
81: #define DISP22(x) ((x) & 0x3fffff)
82: #define DISP30(x) ((x) & 0x3fffffff)
83:
84: /* Register Operand Fields */
85: #define RS1(x) (((x) & 0x1f) << 14)
86: #define RS2(x) ((x) & 0x1f)
87: #define RD(x) (((x) & 0x1f) << 25)
88:
89: /* FORMAT macros used in sparc_i table to decode each opcode */
90: #define FORMAT1(a) (OP(a))
91: #define FORMAT2(a,b) (OP(a) | OP2(b))
92: #define FORMAT3(a,b,c) (OP(a) | OP3(b) | F3I(c))
93: #define FORMAT3F(a,b,c) (OP(a) | OP3(b) | OPF(c))
94:
95: /* Helper macros to construct OP3 & OPF */
96: #define OP3_X(x,y) ((((x) & 3) << 4) | ((y) & 0xf))
97: #define OPF_X(x,y) ((((x) & 0x1f) << 4) | ((y) & 0xf))
98:
99: /* COND condition codes field... */
100: #define COND2(x) (((x) & 0xf) << 14)
101:
102: struct sparc_insn {
103: unsigned long int match;
104: char *name;
105: char *format;
106: };
107:
108: char *regs[] = {
109: "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
110: "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
111: "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
112: "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7"
113: };
114:
115: char *priv_regs[] = {
116: "tpc", "tnpc", "tstate", "tt", "tick", "tba", "pstate", "tl",
117: "pil", "cwp", "cansave", "canrestore", "cleanwin", "otherwin",
118: "wstate", "fq",
119: "", "", "", "", "", "", "", "",
120: "", "", "", "", "", "", "", ""
121: };
122:
123: char *state_regs[] = {
124: "y", "", "ccr", "asi", "tick", "pc", "fprs", "asr",
125: "", "", "", "", "", "", "", "",
126: "illegal", "", "", "", "", "", "", "", "",
127: "", "", "", "", "", "", "", ""
128: };
129:
130: char *ccodes[] = {
131: "fcc0", "fcc1", "fcc2", "fcc3", "icc", "", "xcc", ""
132: };
133:
134: char *prefetch[] = {
135: "n_reads", "one_read", "n_writes", "one_write", "page"
136: };
137:
138:
139: /* The sparc instruction table has a format field which tells what
140: the operand structure for this instruction is. Here are the codes:
141:
142: Modifiers (nust be first):
143: a -- opcode has annul bit
144: p -- opcode has branch prediction bit
145:
146: Codes:
147: 1 -- source register operand stored in rs1
148: 2 -- source register operand stored in rs2
149: d -- destination register operand stored in rd
150: 3 -- floating source register in rs1
151: 4 -- floating source register in rs2
152: e -- floating destination register in rd
153: i -- 13-bit immediate value stored in simm13
154: j -- 11-bit immediate value stored in simm11
155: l -- displacement using d16lo and d16hi
156: m -- 22-bit fcc displacement value
157: n -- 30-bit displacement used in call insns
158: o -- %fcc number specified in cc1 and cc0 fields
159: p -- address computed by the contents of rs1+rs2
160: q -- address computed by the contents of rs1+simm13
161: r -- prefetch
162: s -- %asi is implicit in the insn, rs1 value not used
163: t -- immediate 8-bit asi value
164: u -- 19-bit fcc displacement value
165: 5 -- hard register, %fsr lower-half
166: 6 -- hard register, %fsr all
167: 7 -- [reg_addr rs1+rs2] imm_asi
168: 8 -- [reg_addr rs1+simm13] %asi
169: 9 -- logical or of the cmask and mmask fields (membar insn)
170: 0 -- icc or xcc condition codes register
171: r -- prefection function stored in fcn field
172: A -- privileged register encoded in rs1
173: B -- state register encoded in rs1
174: C -- %hi(value) where value is stored in imm22 field
175: D -- 32-bit shift count in shcnt32
176: E -- 64-bit shift count in shcnt64
177: F -- software trap number stored in sw_trap
178: G -- privileged register encoded in rd
179: H -- state register encoded in rd
180:
181: V8 only:
182: Y -- write y register
183: P -- write psr register
184: T -- write tbr register
185: W -- write wim register
186: */
187:
188:
189: struct sparc_insn sparc_i[] = {
190:
191: /*
192: * Format 1: Call
193: */
194: {(FORMAT1(1)), "call", "n"},
195:
196: /*
197: * Format 0: Sethi & Branches
198: */
199: /* Illegal Instruction Trap */
200: {(FORMAT2(0, 0)), "illtrap", "m"},
201:
202: /* Note: if imm22 is zero then this is actually a "nop" grrr... */
203: {(FORMAT2(0, 0x4)), "sethi", "Cd"},
204:
205: /* Branch on Integer Condition Codes "Bicc" */
206: {(FORMAT2(0, 2) | COND(8)), "ba", "a,m"},
207: {(FORMAT2(0, 2) | COND(0)), "bn", "a,m"},
208: {(FORMAT2(0, 2) | COND(9)), "bne", "a,m"},
209: {(FORMAT2(0, 2) | COND(1)), "be", "a,m"},
210: {(FORMAT2(0, 2) | COND(10)), "bg", "a,m"},
211: {(FORMAT2(0, 2) | COND(2)), "ble", "a,m"},
212: {(FORMAT2(0, 2) | COND(11)), "bge", "a,m"},
213: {(FORMAT2(0, 2) | COND(3)), "bl", "a,m"},
214: {(FORMAT2(0, 2) | COND(12)), "bgu", "a,m"},
215: {(FORMAT2(0, 2) | COND(4)), "bleu", "a,m"},
216: {(FORMAT2(0, 2) | COND(13)), "bcc", "a,m"},
217: {(FORMAT2(0, 2) | COND(5)), "bcs", "a,m"},
218: {(FORMAT2(0, 2) | COND(14)), "bpos", "a,m"},
219: {(FORMAT2(0, 2) | COND(6)), "bneg", "a,m"},
220: {(FORMAT2(0, 2) | COND(15)), "bvc", "a,m"},
221: {(FORMAT2(0, 2) | COND(7)), "bvs", "a,m"},
222:
223: /* Branch on Integer Condition Codes with Prediction "BPcc" */
224: {(FORMAT2(0, 1) | COND(8)), "ba", "ap,u"},
225: {(FORMAT2(0, 1) | COND(0)), "bn", "ap,u"},
226: {(FORMAT2(0, 1) | COND(9)), "bne", "ap,u"},
227: {(FORMAT2(0, 1) | COND(1)), "be", "ap,u"},
228: {(FORMAT2(0, 1) | COND(10)), "bg", "ap,u"},
229: {(FORMAT2(0, 1) | COND(2)), "ble", "ap,u"},
230: {(FORMAT2(0, 1) | COND(11)), "bge", "ap,u"},
231: {(FORMAT2(0, 1) | COND(3)), "bl", "ap,u"},
232: {(FORMAT2(0, 1) | COND(12)), "bgu", "ap,u"},
233: {(FORMAT2(0, 1) | COND(4)), "bleu", "ap,u"},
234: {(FORMAT2(0, 1) | COND(13)), "bcc", "ap,u"},
235: {(FORMAT2(0, 1) | COND(5)), "bcs", "ap,u"},
236: {(FORMAT2(0, 1) | COND(14)), "bpos", "ap,u"},
237: {(FORMAT2(0, 1) | COND(6)), "bneg", "ap,u"},
238: {(FORMAT2(0, 1) | COND(15)), "bvc", "ap,u"},
239: {(FORMAT2(0, 1) | COND(7)), "bvs", "ap,u"},
240:
241: /* Branch on Integer Register with Prediction "BPr" */
242: {(FORMAT2(0, 3) | RCOND2(1)), "brz", "ap,1l"},
243: {(FORMAT2(0, 3) | A(1) | P(1) | RCOND2(2)), "brlex", "ap,1l"},
244: {(FORMAT2(0, 3) | RCOND2(3)), "brlz", "ap,1l"},
245: {(FORMAT2(0, 3) | RCOND2(5)), "brnz", "ap,1l"},
246: {(FORMAT2(0, 3) | RCOND2(6)), "brgz", "ap,1l"},
247: {(FORMAT2(0, 3) | RCOND2(7)), "brgez", "ap,1l"},
248:
249: /* Branch on Floating-Point Condition Codes with Prediction "FBPfcc" */
250: {(FORMAT2(0, 5) | COND(8)), "fba", "ap,m"},
251: {(FORMAT2(0, 5) | COND(0)), "fbn", "ap,m"},
252: {(FORMAT2(0, 5) | COND(7)), "fbu", "ap,m"},
253: {(FORMAT2(0, 5) | COND(6)), "fbg", "ap,m"},
254: {(FORMAT2(0, 5) | COND(5)), "fbug", "ap,m"},
255: {(FORMAT2(0, 5) | COND(4)), "fbl", "ap,m"},
256: {(FORMAT2(0, 5) | COND(3)), "fbul", "ap,m"},
257: {(FORMAT2(0, 5) | COND(2)), "fblg", "ap,m"},
258: {(FORMAT2(0, 5) | COND(1)), "fbne", "ap,m"},
259: {(FORMAT2(0, 5) | COND(9)), "fbe", "ap,m"},
260: {(FORMAT2(0, 5) | COND(10)), "fbue", "ap,m"},
261: {(FORMAT2(0, 5) | COND(11)), "fbge", "ap,m"},
262: {(FORMAT2(0, 5) | COND(12)), "fbuge", "ap,m"},
263: {(FORMAT2(0, 5) | COND(13)), "fble", "ap,m"},
264: {(FORMAT2(0, 5) | COND(14)), "fbule", "ap,m"},
265: {(FORMAT2(0, 5) | COND(15)), "fbo", "ap,m"},
266:
267: /* Branch on Floating-Point Condition Codes "FBfcc" */
268: {(FORMAT2(0, 6) | COND(8)), "fba", "a,m"},
269: {(FORMAT2(0, 6) | COND(0)), "fbn", "a,m"},
270: {(FORMAT2(0, 6) | COND(7)), "fbu", "a,m"},
271: {(FORMAT2(0, 6) | COND(6)), "fbg", "a,m"},
272: {(FORMAT2(0, 6) | COND(5)), "fbug", "a,m"},
273: {(FORMAT2(0, 6) | COND(4)), "fbl", "a,m"},
274: {(FORMAT2(0, 6) | COND(3)), "fbul", "a,m"},
275: {(FORMAT2(0, 6) | COND(2)), "fblg", "a,m"},
276: {(FORMAT2(0, 6) | COND(1)), "fbne", "a,m"},
277: {(FORMAT2(0, 6) | COND(9)), "fbe", "a,m"},
278: {(FORMAT2(0, 6) | COND(10)), "fbue", "a,m"},
279: {(FORMAT2(0, 6) | COND(11)), "fbge", "a,m"},
280: {(FORMAT2(0, 6) | COND(12)), "fbuge", "a,m"},
281: {(FORMAT2(0, 6) | COND(13)), "fble", "a,m"},
282: {(FORMAT2(0, 6) | COND(14)), "fbule", "a,m"},
283: {(FORMAT2(0, 6) | COND(15)), "fbo", "a,m"},
284:
285:
286:
287: /*
288: * Format 3/2: Arithmetic & misc (table 32, appendix E)
289: */
290: {FORMAT3(2, OP3_X(0,0), 0), "add", "12d"},
291: {FORMAT3(2, OP3_X(0,0), 1), "add", "1id"},
292: {FORMAT3(2, OP3_X(1,0), 0), "addcc", "12d"},
293: {FORMAT3(2, OP3_X(1,0), 1), "addcc", "1id"},
294: {FORMAT3(2, OP3_X(2,0), 0), "taddcc", "12d"},
295: {FORMAT3(2, OP3_X(2,0), 1), "taddcc", "1id"},
296: #ifdef V9
297: {(FORMAT3(2, 0x30, 1) | RD(0xf)), "sir", "i"},
298: {FORMAT3(2, OP3_X(3,0), 0), "wr", "12H"},
299: {FORMAT3(2, OP3_X(3,0), 1), "wr", "1iH"},
300: #else
301: {FORMAT3(2, OP3_X(3,0), 0), "wr", "12Y"}, /* wr 1, 2, %y */
302: {FORMAT3(2, OP3_X(3,0), 1), "wr", "1iY"}, /* wr 1, i, %y */
303: #endif
304:
305: {FORMAT3(2, OP3_X(0,1), 0), "and", "12d"},
306: {FORMAT3(2, OP3_X(0,1), 1), "and", "1id"},
307: {FORMAT3(2, OP3_X(1,1), 0), "andcc", "12d"},
308: {FORMAT3(2, OP3_X(1,1), 1), "andcc", "1id"},
309: {FORMAT3(2, OP3_X(2,1), 0), "tsubcc", "12d"},
310: {FORMAT3(2, OP3_X(2,1), 1), "tsubcc", "1id"},
311: #ifdef V9
312: {FORMAT3(2, OP3_X(3,1), 0), "saved", ""},
313: {FORMAT3(2, OP3_X(3,1), 0)|FCN(1), "restored", ""},
314: #else
315: {FORMAT3(2, OP3_X(3,1), 0), "wr", "12P"}, /* wr 1, 2, %psr */
316: {FORMAT3(2, OP3_X(3,1), 1), "wr", "1iP"}, /* wr 1, i, %psr */
317: #endif
318:
319: {FORMAT3(2, OP3_X(0,2), 0), "or", "12d"},
320: {FORMAT3(2, OP3_X(0,2), 1), "or", "1id"},
321: {FORMAT3(2, OP3_X(1,2), 0), "orcc", "12d"},
322: {FORMAT3(2, OP3_X(1,2), 1), "orcc", "1id"},
323: {FORMAT3(2, OP3_X(2,2), 0), "taddcctv", "12d"},
324: {FORMAT3(2, OP3_X(2,2), 1), "taddcctv", "1id"},
325: #ifdef V9
326: {FORMAT3(2, OP3_X(3,2), 0), "wrpr", "12G"},
327: {FORMAT3(2, OP3_X(3,2), 1), "wrpr", "1iG"},
328: #else
329: {FORMAT3(2, OP3_X(3,2), 0), "wr", "12W"}, /* wr 1, 2, %wim */
330: {FORMAT3(2, OP3_X(3,2), 1), "wr", "1iW"}, /* wr 1, i, %wim */
331: #endif
332:
333: {FORMAT3(2, OP3_X(0,3), 0), "xor", "12d"},
334: {FORMAT3(2, OP3_X(0,3), 1), "xor", "1id"},
335: {FORMAT3(2, OP3_X(1,3), 0), "xorcc", "12d"},
336: {FORMAT3(2, OP3_X(1,3), 1), "xorcc", "1id"},
337: {FORMAT3(2, OP3_X(2,3), 0), "tsubcctv", "12d"},
338: {FORMAT3(2, OP3_X(2,3), 1), "tsubcctv", "1id"},
339: #ifdef V9
340: {FORMAT3(2, OP3_X(3,3), 0), "UNDEFINED", ""},
341: #else
342: {FORMAT3(2, OP3_X(3,3), 0), "wr", "12T"}, /* wr 1, 2, %tbr */
343: {FORMAT3(2, OP3_X(3,3), 1), "wr", "1iT"}, /* wr 1, i, %tbr */
344: #endif
345:
346: {FORMAT3(2, OP3_X(0,4), 0), "sub", "12d"},
347: {FORMAT3(2, OP3_X(0,4), 1), "sub", "1id"},
348: {FORMAT3(2, OP3_X(1,4), 0), "subcc", "12d"},
349: {FORMAT3(2, OP3_X(1,4), 1), "subcc", "1id"},
350: {FORMAT3(2, OP3_X(2,4), 0), "mulscc", "12d"},
351: {FORMAT3(2, OP3_X(2,4), 1), "mulscc", "1id"},
352: {FORMAT3(2, OP3_X(3,4), 1), "FPop1", ""}, /* see below */
353:
354: {FORMAT3(2, OP3_X(0,5), 0), "andn", "12d"},
355: {FORMAT3(2, OP3_X(0,5), 1), "andn", "1id"},
356: {FORMAT3(2, OP3_X(1,5), 0), "andncc", "12d"},
357: {FORMAT3(2, OP3_X(1,5), 1), "andncc", "1id"},
358: {FORMAT3(2, OP3_X(2,5), 0), "sll", "12d"},
359: {FORMAT3(2, OP3_X(2,5), 1), "sll", "1Dd"},
360: {FORMAT3(2, OP3_X(2,5)|X(1), 0), "sllx", "12d"},
361: {FORMAT3(2, OP3_X(2,5)|X(1), 1), "sllx", "1Ed"},
362: {FORMAT3(2, OP3_X(3,5), 1), "FPop2", ""}, /* see below */
363:
364: {FORMAT3(2, OP3_X(0,6), 0), "orn", "12d"},
365: {FORMAT3(2, OP3_X(0,6), 1), "orn", "1id"},
366: {FORMAT3(2, OP3_X(1,6), 0), "orncc", "12d"},
367: {FORMAT3(2, OP3_X(1,6), 1), "orncc", "1id"},
368: {FORMAT3(2, OP3_X(2,6), 0), "srl", "12d"},
369: {FORMAT3(2, OP3_X(2,6), 1), "srl", "1Dd"},
370: {FORMAT3(2, OP3_X(2,6)|X(1), 0), "srlx", "12d"},
371: {FORMAT3(2, OP3_X(2,6)|X(1), 1), "srlx", "1Ed"},
372: {FORMAT3(2, OP3_X(3,6), 1), "impdep1", ""},
373:
374: {FORMAT3(2, OP3_X(0,7), 0), "xorn", "12d"},
375: {FORMAT3(2, OP3_X(0,7), 1), "xorn", "1id"},
376: {FORMAT3(2, OP3_X(1,7), 0), "xorncc", "12d"},
377: {FORMAT3(2, OP3_X(1,7), 1), "xorncc", "1id"},
378: {FORMAT3(2, OP3_X(2,7), 0), "sra", "12d"},
379: {FORMAT3(2, OP3_X(2,7), 1), "sra", "1Dd"},
380: {FORMAT3(2, OP3_X(2,7)|X(1), 0), "srax", "12d"},
381: {FORMAT3(2, OP3_X(2,7)|X(1), 1), "srax", "1Ed"},
382: {FORMAT3(2, OP3_X(3,7), 1), "impdep2", ""},
383:
384: {FORMAT3(2, OP3_X(0,8), 0), "addc", "12d"},
385: {FORMAT3(2, OP3_X(0,8), 1), "addc", "1id"},
386: {FORMAT3(2, OP3_X(1,8), 0), "addccc", "12d"},
387: {FORMAT3(2, OP3_X(1,8), 1), "addccc", "1id"},
388: #ifdef V9
389: {(FORMAT3(2, 0x28, 1) | RS1(15)), "membar", "9"},
390: {(FORMAT3(2, 0x28, 0) | RS1(15)), "stbar", ""},
391: {FORMAT3(2, OP3_X(2,8), 0), "rd", "Bd"},
392: #else
393: {FORMAT3(2, OP3_X(2,8), 0), "rd", "Yd"},
394: #endif
395:
396: {FORMAT3(2, OP3_X(3,8), 0), "jmpl", "pd"},
397: {FORMAT3(2, OP3_X(3,8), 1), "jmpl", "qd"},
398:
399: {FORMAT3(2, OP3_X(0,9), 0), "mulx", "12d"},
400: {FORMAT3(2, OP3_X(0,9), 1), "mulx", "1id"},
401: {FORMAT3(2, OP3_X(1,9), 0), "UNDEFINED", ""},
402: #ifdef V9
403: {FORMAT3(2, OP3_X(2,9), 0), "UNDEFINED", ""},
404: #else
405: {FORMAT3(2, OP3_X(2,9), 0), "rd", "Pd"},
406: #endif
407: {FORMAT3(2, OP3_X(3,9), 0), "return", "p"},
408: {FORMAT3(2, OP3_X(3,9), 1), "return", "q"},
409:
410: {FORMAT3(2, OP3_X(0,10), 0), "umul", "12d"},
411: {FORMAT3(2, OP3_X(0,10), 1), "umul", "1id"},
412: {FORMAT3(2, OP3_X(1,10), 0), "umulcc", "12d"},
413: {FORMAT3(2, OP3_X(1,10), 1), "umulcc", "1id"},
414: #ifdef V9
415: {FORMAT3(2, OP3_X(2,10), 0), "rdpr", "Ad"},
416: #else
417: {FORMAT3(2, OP3_X(2,10), 0), "rd", "Wd"},
418: #endif
419: /*
420: * OP3 = (3,10): TCC: Trap on Integer Condition Codes
421: */
422: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x8)), "ta", "12F"},
423: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x8)), "ta", "0F"},
424: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x0)), "tn", "12F"},
425: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x0)), "tn", "0F"},
426: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x9)), "tne", "12F"},
427: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x9)), "tne", "0F"},
428: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x1)), "te", "12F"},
429: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x1)), "te", "0F"},
430: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0xa)), "tg", "12F"},
431: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0xa)), "tg", "0F"},
432: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x2)), "tle", "12F"},
433: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x2)), "tle", "0F"},
434: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0xb)), "tge", "12F"},
435: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0xb)), "tge", "0F"},
436: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x3)), "tl", "12F"},
437: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x3)), "tl", "0F"},
438: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0xc)), "tgu", "12F"},
439: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0xc)), "tgu", "0F"},
440: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x4)), "tleu", "12F"},
441: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x4)), "tleu", "0F"},
442: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0xd)), "tcc", "12F"},
443: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0xd)), "tcc", "0F"},
444: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x5)), "tcs", "12F"},
445: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x5)), "tcs", "0F"},
446: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0xe)), "tpos", "12F"},
447: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0xe)), "tpos", "0F"},
448: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x6)), "tneg", "12F"},
449: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x6)), "tneg", "0F"},
450: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0xf)), "tvc", "12F"},
451: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0xf)), "tvc", "0F"},
452: {(FORMAT3(2, OP3_X(3,10), 0) | COND(0x7)), "tvs", "12F"},
453: {(FORMAT3(2, OP3_X(3,10), 1) | COND(0x7)), "tvs", "0F"},
454:
455: {FORMAT3(2, OP3_X(0,11), 0), "smul", "12d"},
456: {FORMAT3(2, OP3_X(0,11), 1), "smul", "1id"},
457: {FORMAT3(2, OP3_X(1,11), 0), "smulcc", "12d"},
458: {FORMAT3(2, OP3_X(1,11), 1), "smulcc", "1id"},
459: #ifdef V9
460: {FORMAT3(2, OP3_X(2,11), 0), "flushw", ""},
461: #else
462: {FORMAT3(2, OP3_X(2,11), 0), "rd", "Td"},
463: #endif
464: {FORMAT3(2, OP3_X(3,11), 0), "flush", "p"},
465: {FORMAT3(2, OP3_X(3,11), 1), "flush", "q"},
466:
467: {FORMAT3(2, OP3_X(0,12), 0), "subc", "12d"},
468: {FORMAT3(2, OP3_X(0,12), 1), "subc", "1id"},
469: {FORMAT3(2, OP3_X(1,12), 0), "subccc", "12d"},
470: {FORMAT3(2, OP3_X(1,12), 1), "subccc", "1id"},
471: /*
472: * OP3 = (2,12): MOVcc, Move Integer Register on Condition
473: */
474: /* For Integer Condition Codes */
475: {(FORMAT3(2, OP3_X(2,12), 1) | COND(8)), "mova", "0jd"},
476: {(FORMAT3(2, OP3_X(2,12), 1) | COND(0)), "movn", "0jd"},
477: {(FORMAT3(2, OP3_X(2,12), 1) | COND(9)), "movne", "0jd"},
478: {(FORMAT3(2, OP3_X(2,12), 1) | COND(1)), "move", "0jd"},
479: {(FORMAT3(2, OP3_X(2,12), 1) | COND(10)), "movg", "0jd"},
480: {(FORMAT3(2, OP3_X(2,12), 1) | COND(2)), "movle", "0jd"},
481: {(FORMAT3(2, OP3_X(2,12), 1) | COND(11)), "movge", "0jd"},
482: {(FORMAT3(2, OP3_X(2,12), 1) | COND(3)), "movl", "0jd"},
483: {(FORMAT3(2, OP3_X(2,12), 1) | COND(12)), "movgu", "0jd"},
484: {(FORMAT3(2, OP3_X(2,12), 1) | COND(4)), "movleu", "0jd"},
485: {(FORMAT3(2, OP3_X(2,12), 1) | COND(13)), "movcc", "0jd"},
486: {(FORMAT3(2, OP3_X(2,12), 1) | COND(5)), "movcs", "0jd"},
487: {(FORMAT3(2, OP3_X(2,12), 1) | COND(14)), "movpos", "0jd"},
488: {(FORMAT3(2, OP3_X(2,12), 1) | COND(6)), "movneg", "0jd"},
489: {(FORMAT3(2, OP3_X(2,12), 1) | COND(15)), "movvc", "0jd"},
490: {(FORMAT3(2, OP3_X(2,12), 1) | COND(7)), "movvs", "0jd"},
491:
492: /* For Floating-Point Condition Codes */
493: {(FORMAT3(2, OP3_X(2,12), 1) | COND(8)), "mova", "ojd"},
494: {(FORMAT3(2, OP3_X(2,12), 1) | COND(0)), "movn", "ojd"},
495: {(FORMAT3(2, OP3_X(2,12), 1) | COND(7)), "movu", "ojd"},
496: {(FORMAT3(2, OP3_X(2,12), 1) | COND(6)), "movg", "ojd"},
497: {(FORMAT3(2, OP3_X(2,12), 1) | COND(5)), "movug", "ojd"},
498: {(FORMAT3(2, OP3_X(2,12), 1) | COND(4)), "movl", "ojd"},
499: {(FORMAT3(2, OP3_X(2,12), 1) | COND(3)), "movul", "ojd"},
500: {(FORMAT3(2, OP3_X(2,12), 1) | COND(2)), "movlg", "ojd"},
501: {(FORMAT3(2, OP3_X(2,12), 1) | COND(1)), "movne", "ojd"},
502: {(FORMAT3(2, OP3_X(2,12), 1) | COND(9)), "move", "ojd"},
503: {(FORMAT3(2, OP3_X(2,12), 1) | COND(10)), "movue", "ojd"},
504: {(FORMAT3(2, OP3_X(2,12), 1) | COND(11)), "movge", "ojd"},
505: {(FORMAT3(2, OP3_X(2,12), 1) | COND(12)), "movuge", "ojd"},
506: {(FORMAT3(2, OP3_X(2,12), 1) | COND(13)), "movle", "ojd"},
507: {(FORMAT3(2, OP3_X(2,12), 1) | COND(14)), "movule", "ojd"},
508: {(FORMAT3(2, OP3_X(2,12), 1) | COND(15)), "movo", "ojd"},
509:
510: {FORMAT3(2, OP3_X(3,12), 0), "save", "12d"},
511: {FORMAT3(2, OP3_X(3,12), 1), "save", "1id"},
512:
513: {FORMAT3(2, OP3_X(0,13), 0), "udivx", "12d"},
514: {FORMAT3(2, OP3_X(0,13), 1), "udivx", "1id"},
515: {FORMAT3(2, OP3_X(1,13), 0), "UNDEFINED", ""},
516: {FORMAT3(2, OP3_X(2,13), 0), "sdivx", "12d"},
517: {FORMAT3(2, OP3_X(2,13), 1), "sdivx", "1id"},
518: {FORMAT3(2, OP3_X(3,13), 0), "restore", "12d"},
519: {FORMAT3(2, OP3_X(3,13), 1), "restore", "1id"},
520:
521: {FORMAT3(2, OP3_X(0,14), 0), "udiv", "12d"},
522: {FORMAT3(2, OP3_X(0,14), 1), "udiv", "1id"},
523: {FORMAT3(2, OP3_X(1,14), 0), "udivcc", "12d"},
524: {FORMAT3(2, OP3_X(1,14), 1), "udivcc", "1id"},
525: {FORMAT3(2, OP3_X(2,14), 0), "popc", "2d"},
526: {FORMAT3(2, OP3_X(2,14), 1), "popc", "id"},
527:
528: {FORMAT3(2, OP3_X(3,14), 0), "done", ""},
529: {FORMAT3(2, OP3_X(3,14)|FCN(1), 1), "retry", ""},
530:
531: {FORMAT3(2, OP3_X(0,15), 0), "sdiv", "12d"},
532: {FORMAT3(2, OP3_X(0,15), 1), "sdiv", "1id"},
533: {FORMAT3(2, OP3_X(1,15), 0), "sdivcc", "12d"},
534: {FORMAT3(2, OP3_X(1,15), 1), "sdivcc", "1id"},
535: /*
536: * OP3 = (2,15): MOVr:
537: * Move Integer Register on Register Condition
538: */
539: {(FORMAT3(2, OP3_X(2,15), 1) | RCOND34(1)), "movrz", "1jd"},
540: {(FORMAT3(2, OP3_X(2,15), 0) | RCOND34(1)), "movrz", "12d"},
541: {(FORMAT3(2, OP3_X(2,15), 1) | RCOND34(2)), "movrlez", "1jd"},
542: {(FORMAT3(2, OP3_X(2,15), 0) | RCOND34(2)), "movrlez", "12d"},
543: {(FORMAT3(2, OP3_X(2,15), 1) | RCOND34(3)), "movrlz", "1jd"},
544: {(FORMAT3(2, OP3_X(2,15), 0) | RCOND34(3)), "movrlz", "12d"},
545: {(FORMAT3(2, OP3_X(2,15), 1) | RCOND34(5)), "movrnz", "1jd"},
546: {(FORMAT3(2, OP3_X(2,15), 0) | RCOND34(5)), "movrnz", "12d"},
547: {(FORMAT3(2, OP3_X(2,15), 1) | RCOND34(6)), "movrgz", "1jd"},
548: {(FORMAT3(2, OP3_X(2,15), 0) | RCOND34(6)), "movrgz", "12d"},
549: {(FORMAT3(2, OP3_X(2,15), 1) | RCOND34(7)), "movrgez", "1jd"},
550: {(FORMAT3(2, OP3_X(2,15), 0) | RCOND34(7)), "movrgez", "12d"},
551:
552: {FORMAT3(2, OP3_X(3,15), 0), "UNDEFINED", ""},
553:
554:
555: /*
556: * Format 3/3: Load and store (appendix E, table 33)
557: */
558:
559: /* Loads */
560: {(FORMAT3(3, OP3_X(0,0), 0)), "ld", "pd"}, /* officially: lduw */
561: {(FORMAT3(3, OP3_X(0,0), 1)), "ld", "qd"},
562: {(FORMAT3(3, OP3_X(1,0), 0)), "lda", "7d"}, /* officially: lduwa */
563: {(FORMAT3(3, OP3_X(1,0), 1)), "lda", "8d"},
564: {(FORMAT3(3, OP3_X(2,0), 0)), "ldf", "pe"},
565: {(FORMAT3(3, OP3_X(2,0), 1)), "ldf", "qe"},
566: {(FORMAT3(3, OP3_X(3,0), 0)), "ldfa", "7e"},
567: {(FORMAT3(3, OP3_X(3,0), 1)), "ldfa", "8e"},
568:
569: {(FORMAT3(3, OP3_X(0,1), 0)), "ldub", "pd"},
570: {(FORMAT3(3, OP3_X(0,1), 1)), "ldub", "qd"},
571: {(FORMAT3(3, OP3_X(1,1), 0)), "lduba", "7d"},
572: {(FORMAT3(3, OP3_X(1,1), 1)), "lduba", "8d"},
573: {(FORMAT3(3, OP3_X(2,1), 0) | RD(0)), "ld", "p5"},
574: {(FORMAT3(3, OP3_X(2,1), 1) | RD(0)), "ld", "q5"},
575: {(FORMAT3(3, OP3_X(2,1), 0) | RD(1)), "ldx", "p6"},
576: {(FORMAT3(3, OP3_X(2,1), 1) | RD(1)), "ldx", "q6"},
577:
578: {(FORMAT3(3, OP3_X(0,2), 0)), "lduh", "pd"},
579: {(FORMAT3(3, OP3_X(0,2), 1)), "lduh", "qd"},
580: {(FORMAT3(3, OP3_X(1,2), 0)), "lduha", "7d"},
581: {(FORMAT3(3, OP3_X(1,2), 1)), "lduha", "8d"},
582: {(FORMAT3(3, OP3_X(2,2), 0)), "ldq", "pe"},
583: {(FORMAT3(3, OP3_X(2,2), 1)), "ldq", "qe"},
584: {(FORMAT3(3, OP3_X(3,2), 0)), "ldqa", "7e"},
585: {(FORMAT3(3, OP3_X(3,2), 1)), "ldqa", "8e"},
586:
587: {(FORMAT3(3, OP3_X(0,3), 0)), "ldd", "pd"},
588: {(FORMAT3(3, OP3_X(0,3), 1)), "ldd", "qd"},
589: {(FORMAT3(3, OP3_X(1,3), 0)), "ldda", "7d"},
590: {(FORMAT3(3, OP3_X(1,3), 1)), "ldda", "8d"},
591: {(FORMAT3(3, OP3_X(2,3), 0)), "ldd", "pe"},
592: {(FORMAT3(3, OP3_X(2,3), 1)), "ldd", "qe"},
593: {(FORMAT3(3, OP3_X(3,3), 0)), "ldda", "7e"},
594: {(FORMAT3(3, OP3_X(3,3), 1)), "ldda", "8e"},
595:
596: {(FORMAT3(3, OP3_X(0,4), 0)), "st", "dp"}, /* officially: stw */
597: {(FORMAT3(3, OP3_X(0,4), 1)), "st", "dq"},
598: {(FORMAT3(3, OP3_X(1,4), 0)), "sta", "d7"}, /* officially: stwa */
599: {(FORMAT3(3, OP3_X(1,4), 1)), "sta", "d8"},
600: {(FORMAT3(3, OP3_X(2,4), 0)), "st", "ep"},
601: {(FORMAT3(3, OP3_X(2,4), 1)), "st", "eq"},
602: {(FORMAT3(3, OP3_X(3,4), 0)), "sta", "e7"},
603: {(FORMAT3(3, OP3_X(3,4), 1)), "sta", "e8"},
604:
605: {(FORMAT3(3, OP3_X(0,5), 0)), "stb", "dp"},
606: {(FORMAT3(3, OP3_X(0,5), 1)), "stb", "dq"},
607: {(FORMAT3(3, OP3_X(1,5), 0)), "stba", "d7"},
608: {(FORMAT3(3, OP3_X(1,5), 1)), "stba", "d8"},
609: {(FORMAT3(3, OP3_X(2,5), 0)), "st", "5p"},
610: {(FORMAT3(3, OP3_X(2,5), 1)), "st", "5q"},
611: {(FORMAT3(3, OP3_X(2,5), 0)|RD(1)), "stx", "6p"},
612: {(FORMAT3(3, OP3_X(2,5), 1)|RD(1)), "stx", "6q"},
613:
614: {(FORMAT3(3, OP3_X(0,6), 0)), "sth", "dp"},
615: {(FORMAT3(3, OP3_X(0,6), 1)), "sth", "dq"},
616: {(FORMAT3(3, OP3_X(1,6), 0)), "stha", "d7"},
617: {(FORMAT3(3, OP3_X(1,6), 1)), "stha", "d8"},
618: {(FORMAT3(3, OP3_X(2,6), 0)), "stq", "ep"},
619: {(FORMAT3(3, OP3_X(2,6), 1)), "stq", "eq"},
620: {(FORMAT3(3, OP3_X(3,6), 0)), "stqa", "e7"},
621: {(FORMAT3(3, OP3_X(3,6), 1)), "stqa", "e8"},
622:
623: {(FORMAT3(3, OP3_X(0,7), 0)), "std", "dp"},
624: {(FORMAT3(3, OP3_X(0,7), 1)), "std", "dq"},
625: {(FORMAT3(3, OP3_X(1,7), 0)), "stda", "d7"},
626: {(FORMAT3(3, OP3_X(1,7), 1)), "stda", "d8"},
627: {(FORMAT3(3, OP3_X(2,7), 0)), "std", "ep"},
628: {(FORMAT3(3, OP3_X(2,7), 1)), "std", "eq"},
629: {(FORMAT3(3, OP3_X(3,7), 0)), "stda", "e7"},
630: {(FORMAT3(3, OP3_X(3,7), 1)), "stda", "e8"},
631:
632: {(FORMAT3(3, OP3_X(0,8), 0)), "ldsw", "pd"},
633: {(FORMAT3(3, OP3_X(0,8), 1)), "ldsw", "qd"},
634: {(FORMAT3(3, OP3_X(1,8), 0)), "ldswa", "7d"},
635: {(FORMAT3(3, OP3_X(1,8), 1)), "ldswa", "8d"},
636:
637: {(FORMAT3(3, OP3_X(0,9), 0)), "ldsb", "pd"},
638: {(FORMAT3(3, OP3_X(0,9), 1)), "ldsb", "qd"},
639: {(FORMAT3(3, OP3_X(1,9), 0)), "ldsba", "7d"},
640: {(FORMAT3(3, OP3_X(1,9), 1)), "ldsba", "8d"},
641:
642: {(FORMAT3(3, OP3_X(0,10), 0)), "ldsh", "pd"},
643: {(FORMAT3(3, OP3_X(0,10), 1)), "ldsh", "qd"},
644: {(FORMAT3(3, OP3_X(1,10), 0)), "ldsha", "7d"},
645: {(FORMAT3(3, OP3_X(1,10), 1)), "ldsha", "8d"},
646:
647: {(FORMAT3(3, OP3_X(0,11), 0)), "ldx", "pd"},
648: {(FORMAT3(3, OP3_X(0,11), 1)), "ldx", "qd"},
649: {(FORMAT3(3, OP3_X(1,11), 0)), "ldxa", "7d"},
650: {(FORMAT3(3, OP3_X(1,11), 1)), "ldxa", "8d"},
651:
652: {(FORMAT3(3, OP3_X(3,12), 1)), "casa", "s2d"},
653: {(FORMAT3(3, OP3_X(3,12), 0)), "casa", "t2d"},
654:
655: {(FORMAT3(3, OP3_X(0,13), 0)), "ldstub", "7d"},
656: {(FORMAT3(3, OP3_X(0,13), 1)), "ldstub", "8d"},
657: {(FORMAT3(3, OP3_X(1,13), 0)), "ldstuba", "pd"},
658: {(FORMAT3(3, OP3_X(1,13), 1)), "ldstuba", "qd"},
659: {(FORMAT3(3, OP3_X(2,13), 0)), "prefetch", "pr"},
660: {(FORMAT3(3, OP3_X(2,13), 1)), "prefetch", "qr"},
661: {(FORMAT3(3, OP3_X(3,13), 0)), "prefetcha", "7r"},
662: {(FORMAT3(3, OP3_X(3,13), 1)), "prefetcha", "8r"},
663:
664: {(FORMAT3(3, OP3_X(0,14), 0)), "stx", "dp"},
665: {(FORMAT3(3, OP3_X(0,14), 1)), "stx", "dq"},
666: {(FORMAT3(3, OP3_X(1,14), 0)), "stwa", "d7"},
667: {(FORMAT3(3, OP3_X(1,14), 1)), "stwa", "d8"},
668: {(FORMAT3(3, OP3_X(3,14), 0)), "casxa", "t2d"},
669: {(FORMAT3(3, OP3_X(3,14), 1)), "casxa", "s2d"},
670:
671: /* Swap Register */
672: {(FORMAT3(3, OP3_X(0,15), 0)), "swap", "pd"},
673: {(FORMAT3(3, OP3_X(0,15), 1)), "swap", "qd"},
674: {(FORMAT3(3, OP3_X(1,15), 0)), "swapa", "7d"},
675: {(FORMAT3(3, OP3_X(1,15), 1)), "swapa", "8d"},
676:
677:
678: /*
679: * OP3 = (3,4): FPop1 (table 34)
680: */
681: {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,1))), "fmovs", "4e"},
682: {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,2))), "fmovd", "4e"},
683: {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,3))), "fmovq", "4e"},
684: {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,5))), "fnegs", "4e"},
685: {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,6))), "fnegd", "4e"},
686: {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,7))), "fnegq", "4e"},
687: {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,9))), "fabss", "4e"},
688: {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,10))), "fabsd", "4e"},
689: {(FORMAT3F(2, OP3_X(3,4), OPF_X(0,11))), "fabsq", "4e"},
690:
691: {(FORMAT3F(2, OP3_X(3,4), OPF_X(2,9))), "fsqrts", "4e"},
692: {(FORMAT3F(2, OP3_X(3,4), OPF_X(2,10))), "fsqrtd", "4e"},
693: {(FORMAT3F(2, OP3_X(3,4), OPF_X(2,11))), "fsqrtq", "4e"},
694:
695: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,1))), "fadds", "34e"},
696: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,2))), "faddd", "34e"},
697: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,3))), "faddq", "34e"},
698: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,5))), "fsubs", "34e"},
699: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,6))), "fsubd", "34e"},
700: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,7))), "fsubq", "34e"},
701: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,9))), "fmuls", "34e"},
702: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,10))), "fmuld", "34e"},
703: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,11))), "fmulq", "34e"},
704: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,13))), "fdivs", "34e"},
705: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,14))), "fdivd", "34e"},
706: {(FORMAT3F(2, OP3_X(3,4), OPF_X(4,15))), "fdivq", "34e"},
707:
708: {(FORMAT3F(2, OP3_X(3,4), OPF_X(6,9))), "fsmuld", "34e"},
709: {(FORMAT3F(2, OP3_X(3,4), OPF_X(6,14))), "fdmulq", "34e"},
710:
711: {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,1))), "fstox", "4e"},
712: {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,2))), "fdtox", "4e"},
713: {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,3))), "fqtox", "4e"},
714: {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,4))), "fxtos", "4e"},
715: {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,8))), "fxtod", "4e"},
716: {(FORMAT3F(2, OP3_X(3,4), OPF_X(8,12))), "fxtoq", "4e"},
717:
718: {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,4))), "fitos", "4e"},
719: {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,6))), "fdtos", "4e"},
720: {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,7))), "fqtos", "4e"},
721: {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,8))), "fitod", "4e"},
722: {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,9))), "fstod", "4e"},
723: {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,11))), "fqtod", "4e"},
724: {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,12))), "fitoq", "4e"},
725: {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,13))), "fstoq", "4e"},
726: {(FORMAT3F(2, OP3_X(3,4), OPF_X(12,14))), "fdtoq", "4e"},
727:
728: {(FORMAT3F(2, OP3_X(3,4), OPF_X(13,1))), "fstoi", "4e"},
729: {(FORMAT3F(2, OP3_X(3,4), OPF_X(13,2))), "fdtoi", "4e"},
730: {(FORMAT3F(2, OP3_X(3,4), OPF_X(13,3))), "fqtoi", "4e"},
731:
732:
733: #ifdef xxx
734: /*
735: * OP3 =(3,5): FPop2 (table 35)
736: */
737: {(FORMAT3F(2, OP3_X(3,5), 81)), "fcmps", "o34"},
738: {(FORMAT3F(2, OP3_X(3,5), 82)), "fcmpd", "o34"},
739: {(FORMAT3F(2, OP3_X(3,5), 83)), "fcmpq", "o34"},
740: {(FORMAT3F(2, OP3_X(3,5), 85)), "fcmpes", "o34"},
741: {(FORMAT3F(2, OP3_X(3,5), 86)), "fcmped", "o34"},
742: {(FORMAT3F(2, OP3_X(3,5), 87)), "fcmpeq", "o34"},
743:
744: /* Move Floating-Point Register on Condition "FMOVcc" */
745: /* FIXME should check for single, double, and quad movements */
746: /* Integer Condition Codes */
747: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(8)), "fmova", "04e"},
748: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0)), "fmovn", "04e"},
749: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(9)), "fmovne", "04e"},
750: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(1)), "fmove", "04e"},
751: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(10)), "fmovg", "04e"},
752: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(2)), "fmovle", "04e"},
753: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(11)), "fmovge", "04e"},
754: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(3)), "fmovl", "04e"},
755: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(12)), "fmovgu", "04e"},
756: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(4)), "fmovleu", "04e"},
757: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(13)), "fmovcc", "04e"},
758: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(5)), "fmovcs", "04e"},
759: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(14)), "fmovpos", "04e"},
760: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(6)), "fmovneg", "04e"},
761: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(15)), "fmovvc", "04e"},
762: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(7)), "fmovvs", "04e"},
763:
764: /* Floating-Point Condition Codes */
765: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(8)), "fmova", "o4e"},
766: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(0)), "fmovn", "o4e"},
767: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(7)), "fmovu", "o4e"},
768: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(6)), "fmovg", "o4e"},
769: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(5)), "fmovug", "o4e"},
770: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(4)), "fmovk", "o4e"},
771: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(3)), "fmovul", "o4e"},
772: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(2)), "fmovlg", "o4e"},
773: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(1)), "fmovne", "o4e"},
774: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(9)), "fmove", "o4e"},
775: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(10)), "fmovue", "o4e"},
776: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(11)), "fmovge", "o4e"},
777: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(12)), "fmovuge", "o4e"},
778: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(13)), "fmovle", "o4e"},
779: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(14)), "fmovule", "o4e"},
780: {(FORMAT3(2, OP3_X(3,5), 0) | COND2(15)), "fmovo", "o4e"},
781:
782: /* Move F-P Register on Integer Register Condition "FMOVr" */
783: /* FIXME: check for short, double, and quad's */
784: {(FORMAT3(2, OP3_X(3,5), 0) | RCOND34(1)), "fmovre", "14e"},
785: {(FORMAT3(2, OP3_X(3,5), 0) | RCOND34(2)), "fmovrlez", "14e"},
786: {(FORMAT3(2, OP3_X(3,5), 0) | RCOND34(3)), "fmovrlz", "14e"},
787: {(FORMAT3(2, OP3_X(3,5), 0) | RCOND34(5)), "fmovrne", "14e"},
788: {(FORMAT3(2, OP3_X(3,5), 0) | RCOND34(6)), "fmovrgz", "14e"},
789: {(FORMAT3(2, OP3_X(3,5), 0) | RCOND34(7)), "fmovrgez", "14e"},
790: #endif
791:
792: /* grrrr.... */
793: {0, 0, 0}
794:
795: };
796:
797: db_addr_t
798: db_disasm(loc, altfmt)
799: vaddr_t loc;
800: boolean_t altfmt;
801: {
802: struct sparc_insn* i_ptr = (struct sparc_insn *)&sparc_i;
803:
804: unsigned long int insn, you_lose, bitmask;
805: int matchp;
806: char *f_ptr, *cp;
807:
808: you_lose = 0;
809: matchp = 0;
810: insn = db_get_value(loc, 4, 0);
811:
812: if (insn == 0x01000000) {
813: db_printf("nop\n");
814: return loc + 4;
815: }
816:
817: while (i_ptr->name) {
818: /* calculate YOU_LOSE value */
819: bitmask= (i_ptr->match);
820: you_lose = (~bitmask);
821:
822: if (((bitmask>>30) & 0x3) == 0x1) {
823: /* Call */
824: you_lose = ((~0x1)<<30);
825: } else if (((bitmask>>30) & 0x3) == 0x0) {
826: if (((bitmask>>22) & 0x7) == 0x4) {
827: /* Sethi */
828: you_lose &= (FORMAT2(0x3,0x7));
829: } else {
830: /* Branches */
831: you_lose &= (FORMAT2(0x3,0x7)|COND(0xf));
832: }
833: } else if (((bitmask>>30) & 0x3) == 0x2 &&
834: ((bitmask>>19) & 0x3f) == 0x34) /* XXX */ {
835: /* FPop1 */
836: you_lose &= (FORMAT3(0x3,0x3f,0x1) | OPF(0x1ff));
837: } else {
838: you_lose &= (FORMAT3(0x3,0x3f,0x1));
839: }
840:
841: if (((bitmask & insn) == bitmask) && ((you_lose & insn) == 0)) {
842: matchp = 1;
843: break;
844: }
845: i_ptr++;
846: };
847:
848: if (!matchp) {
849: db_printf("undefined\n");
850: return loc + 4;
851: }
852:
853: db_printf("%s", i_ptr->name);
854:
855: f_ptr = i_ptr->format;
856:
857: for (cp = f_ptr; *cp; cp++) {
858: if (*cp == ',') {
859: for (;f_ptr < cp; f_ptr++)
860: switch (*f_ptr) {
861: case 'a':
862: if (insn & A(1))
863: db_printf(",a");
864: break;
865: case 'p':
866: if (insn & P(1))
867: db_printf(",pt");
868: else
869: db_printf(",pn");
870: break;
871: }
872: f_ptr++;
873: break;
874: }
875: }
876: db_printf(" \t");
877:
878: while (*f_ptr) {
879: switch (*f_ptr) {
880: case '1':
881: db_printf("%%%s", regs[((insn >> 14) & 0x1f)]);
882: break;
883: case '2':
884: db_printf("%%%s", regs[(insn & 0x1f)]);
885: break;
886: case 'd':
887: db_printf("%%%s", regs[((insn >> 25) & 0x1f)]);
888: break;
889: case '3':
890: db_printf("%%f%ld", ((insn >> 14) & 0x1f));
891: break;
892: case '4':
893: db_printf("%%f%ld", (insn & 0x1f));
894: break;
895: case 'e':
896: db_printf("%%f%ld", ((insn >> 25) & 0x1f));
897: break;
898: case 'i':
899: db_printf("0x%lx", (insn & 0x1fff));
900: break;
901: case 'j':
902: db_printf("0x%lx", (insn & 0x7ff));
903: break;
904: case 'l':
905: db_printf("0x%lx", ((insn & 0x1fff) |
906: ((insn >> 20) & 0x3)));
907: break;
908: case 'm':
909: db_printsym(
910: (db_addr_t)(loc + (4 * (insn & 0x3fffff))),
911: DB_STGY_ANY, db_printf);
912: break;
913: case 'u':
914: db_printsym(
915: (db_addr_t)(loc + (4 * (insn & 0x7ffff))),
916: DB_STGY_ANY, db_printf);
917: break;
918: case 'n':
919: db_printsym(
920: (db_addr_t)(loc + (4 * (insn & 0x3fffffff))),
921: DB_STGY_PROC, db_printf);
922: break;
923: case 's':
924: db_printf("%%asi");
925: break;
926: case 't':
927: db_printf("0x%-2.2lx", ((insn >> 5) & 0xff));
928: break;
929: case 'o':
930: db_printf("%%fcc%ld", ((insn >> 25) & 0x3));
931: break;
932: case 'p':
933: case '7':
934: db_printf("[%%%s + %%%s]",
935: regs[((insn >> 14) & 0x1f)],
936: regs[(insn & 0x1f)]);
937: if (*f_ptr == '7')
938: db_printf(" %ld", ((insn >> 5) & 0xff));
939: break;
940: case 'q':
941: case '8':
942: db_printf("[%%%s + 0x%lx]",
943: regs[((insn >> 14) & 0x1f)],
944: (insn & 0x1fff));
945: if (*f_ptr == '8')
946: db_printf(" %%asi");
947: break;
948: case '5':
949: db_printf("%%fsr");
950: break;
951: case '6':
952: db_printf("%%fsr");
953: break;
954: case '9':
955: db_printf("0x%lxl",
956: ((insn & 0xf) | ((insn >> 4) & 0x7)));
957: break;
958: case '0':
959: db_printf("%%%s", ccodes[((insn >> 11) & 0x7)]);
960: break;
961: case 'r':
962: db_printf("#%s", prefetch[((insn >> 25) & 0x1f)]);
963: break;
964: case 'A':
965: db_printf("%%%s", priv_regs[((insn >> 14) & 0x1f)]);
966: break;
967: case 'B':
968: db_printf("%%%s", state_regs[((insn >> 14) & 0x1f)]);
969: break;
970: case 'C':
971: db_printf("%%hi(0x%lx)", ((insn & 0x3fffff) << 10));
972: break;
973: case 'D':
974: db_printf("0x%lx", (insn & 0x1f));
975: break;
976: case 'E':
977: db_printf("0x%lx", (insn & 0x3f));
978: break;
979: case 'F':
980: db_printf("0x%lx", (insn & 0x3f));
981: break;
982: case 'G':
983: db_printf("%%%s", priv_regs[((insn >> 25) & 0x1f)]);
984: break;
985: case 'H':
986: db_printf("%%%s", state_regs[((insn >> 25) & 0x1f)]);
987: break;
988: #ifndef V9
989: case 'P':
990: db_printf("%%psr");
991: break;
992: case 'T':
993: db_printf("%%tbr");
994: break;
995: case 'W':
996: db_printf("%%wim");
997: break;
998: case 'Y':
999: db_printf("%%y");
1000: break;
1001: #endif
1002: default:
1003: db_printf("(UNKNOWN)");
1004: break;
1005: }
1006: if (*(++f_ptr))
1007: db_printf(", ");
1008: };
1009:
1010: db_printf("\n");
1011:
1012: return (loc + 4);
1013: }
1014:
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