Annotation of sys/arch/sparc/sparc/asm.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: asm.h,v 1.5 2003/06/02 23:27:55 millert Exp $ */
2: /* $NetBSD: asm.h,v 1.4 1996/07/01 18:01:26 abrown Exp $ */
3:
4: /*
5: * Copyright (c) 1992, 1993
6: * The Regents of the University of California. All rights reserved.
7: *
8: * This software was developed by the Computer Systems Engineering group
9: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10: * contributed to Berkeley.
11: *
12: * All advertising materials mentioning features or use of this software
13: * must display the following acknowledgement:
14: * This product includes software developed by the University of
15: * California, Lawrence Berkeley Laboratory.
16: *
17: * Redistribution and use in source and binary forms, with or without
18: * modification, are permitted provided that the following conditions
19: * are met:
20: * 1. Redistributions of source code must retain the above copyright
21: * notice, this list of conditions and the following disclaimer.
22: * 2. Redistributions in binary form must reproduce the above copyright
23: * notice, this list of conditions and the following disclaimer in the
24: * documentation and/or other materials provided with the distribution.
25: * 3. Neither the name of the University nor the names of its contributors
26: * may be used to endorse or promote products derived from this software
27: * without specific prior written permission.
28: *
29: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39: * SUCH DAMAGE.
40: *
41: * @(#)asm.h 8.1 (Berkeley) 6/11/93
42: */
43:
44: /*
45: * GCC __asm constructs for doing assembly stuff.
46: */
47:
48: /*
49: * ``Routines'' to load and store from/to alternate address space.
50: * The location can be a variable, the asi value (address space indicator)
51: * must be a constant.
52: *
53: * N.B.: You can put as many special functions here as you like, since
54: * they cost no kernel space or time if they are not used.
55: *
56: * These were static inline functions, but gcc screws up the constraints
57: * on the address space identifiers (the "n"umeric value part) because
58: * it inlines too late, so we have to use the funny valued-macro syntax.
59: */
60:
61: /* load byte from alternate address space */
62: #define lduba(loc, asi) ({ \
63: register int _lduba_v; \
64: __asm __volatile("lduba [%1]%2,%0" : "=r" (_lduba_v) : \
65: "r" ((int)(loc)), "n" (asi)); \
66: _lduba_v; \
67: })
68:
69: /* load half-word from alternate address space */
70: #define lduha(loc, asi) ({ \
71: register int _lduha_v; \
72: __asm __volatile("lduha [%1]%2,%0" : "=r" (_lduha_v) : \
73: "r" ((int)(loc)), "n" (asi)); \
74: _lduha_v; \
75: })
76:
77: /* load int from alternate address space */
78: #define lda(loc, asi) ({ \
79: register int _lda_v; \
80: __asm __volatile("lda [%1]%2,%0" : "=r" (_lda_v) : \
81: "r" ((int)(loc)), "n" (asi)); \
82: _lda_v; \
83: })
84:
85: /* store byte to alternate address space */
86: #define stba(loc, asi, value) ({ \
87: __asm __volatile("stba %0,[%1]%2" : : \
88: "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
89: })
90:
91: /* store half-word to alternate address space */
92: #define stha(loc, asi, value) ({ \
93: __asm __volatile("stha %0,[%1]%2" : : \
94: "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
95: })
96:
97: /* store int to alternate address space */
98: #define sta(loc, asi, value) ({ \
99: __asm __volatile("sta %0,[%1]%2" : : \
100: "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
101: })
102:
103: /* load 64-bit int from alternate address space */
104: #define ldda(loc, asi) ({ \
105: register long long _lda_v; \
106: __asm __volatile("ldda [%1]%2,%0" : "=r" (_lda_v) : \
107: "r" ((int)(loc)), "n" (asi)); \
108: _lda_v; \
109: })
110:
111: /* store 64-bit int to alternate address space */
112: #define stda(loc, asi, value) ({ \
113: __asm __volatile("stda %0,[%1]%2" : : \
114: "r" ((long long)(value)), "r" ((int)(loc)), "n" (asi)); \
115: })
116:
117: /* atomic swap of a word between a register and memory */
118: #define swap(loc, val) ({ \
119: __asm __volatile("swap [%2],%0" : "=&r" (val) : "0" (val), "r" (loc)); \
120: })
121:
122: #define wrasr(value, asr) _wrasr(value, asr)
123: #define _wrasr(value, asr) ({ \
124: __asm __volatile("wr %0, 0, %%asr"#asr : : "r" ((int)(value))); \
125: })
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