Annotation of sys/arch/sparc/fpu/fpu_arith.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: fpu_arith.h,v 1.3 2003/06/02 23:27:54 millert Exp $ */
2: /* $NetBSD: fpu_arith.h,v 1.2 1994/11/20 20:52:35 deraadt Exp $ */
3:
4: /*
5: * Copyright (c) 1992, 1993
6: * The Regents of the University of California. All rights reserved.
7: *
8: * This software was developed by the Computer Systems Engineering group
9: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10: * contributed to Berkeley.
11: *
12: * All advertising materials mentioning features or use of this software
13: * must display the following acknowledgement:
14: * This product includes software developed by the University of
15: * California, Lawrence Berkeley Laboratory.
16: *
17: * Redistribution and use in source and binary forms, with or without
18: * modification, are permitted provided that the following conditions
19: * are met:
20: * 1. Redistributions of source code must retain the above copyright
21: * notice, this list of conditions and the following disclaimer.
22: * 2. Redistributions in binary form must reproduce the above copyright
23: * notice, this list of conditions and the following disclaimer in the
24: * documentation and/or other materials provided with the distribution.
25: * 3. Neither the name of the University nor the names of its contributors
26: * may be used to endorse or promote products derived from this software
27: * without specific prior written permission.
28: *
29: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39: * SUCH DAMAGE.
40: *
41: * @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93
42: */
43:
44: /*
45: * Extended-precision arithmetic.
46: *
47: * We hold the notion of a `carry register', which may or may not be a
48: * machine carry bit or register. On the SPARC, it is just the machine's
49: * carry bit.
50: *
51: * In the worst case, you can compute the carry from x+y as
52: * (unsigned)(x + y) < (unsigned)x
53: * and from x+y+c as
54: * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0)
55: * for example.
56: */
57:
58: /* set up for extended-precision arithemtic */
59: #define FPU_DECL_CARRY
60:
61: /*
62: * We have three kinds of add:
63: * add with carry: r = x + y + c
64: * add (ignoring current carry) and set carry: c'r = x + y + 0
65: * add with carry and set carry: c'r = x + y + c
66: * The macros use `C' for `use carry' and `S' for `set carry'.
67: * Note that the state of the carry is undefined after ADDC and SUBC,
68: * so if all you have for these is `add with carry and set carry',
69: * that is OK.
70: *
71: * The same goes for subtract, except that we compute x - y - c.
72: *
73: * Finally, we have a way to get the carry into a `regular' variable,
74: * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero
75: * into carry; GET_CARRY sets its argument to 0 or 1.
76: */
77: #define FPU_ADDC(r, x, y) \
78: asm volatile("addx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
79: #define FPU_ADDS(r, x, y) \
80: asm volatile("addcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
81: #define FPU_ADDCS(r, x, y) \
82: asm volatile("addxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
83: #define FPU_SUBC(r, x, y) \
84: asm volatile("subx %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
85: #define FPU_SUBS(r, x, y) \
86: asm volatile("subcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
87: #define FPU_SUBCS(r, x, y) \
88: asm volatile("subxcc %1,%2,%0" : "=r"(r) : "r"(x), "r"(y))
89:
90: #define FPU_GET_CARRY(r) asm volatile("addx %%g0,%%g0,%0" : "=r"(r))
91: #define FPU_SET_CARRY(v) asm volatile("addcc %0,-1,%%g0" : : "r"(v))
92:
93: #define FPU_SHL1_BY_ADD /* shift left 1 faster by ADDC than (a<<1)|(b>>31) */
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