Annotation of sys/arch/sparc/dev/xdreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: xdreg.h,v 1.5 2007/05/25 21:27:15 krw Exp $ */
2: /* $NetBSD: xdreg.h,v 1.3 1996/03/31 22:38:54 pk Exp $ */
3:
4: /*
5: *
6: * Copyright (c) 1995 Charles D. Cranor
7: * All rights reserved.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. All advertising materials mentioning features or use of this software
18: * must display the following acknowledgement:
19: * This product includes software developed by Charles D. Cranor.
20: * 4. The name of the author may not be used to endorse or promote products
21: * derived from this software without specific prior written permission.
22: *
23: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33: */
34:
35: /*
36: * x d r e g . h
37: *
38: * this file contains the description of the Xylogics 753/7053's hardware
39: * data structures.
40: *
41: * author: Chuck Cranor <chuck@ccrc.wustl.edu>
42: */
43:
44: #define XDC_MAXDEV 4 /* max devices per controller */
45: #define XDC_RESETUSEC 1000000 /* max time for xdc reset (page 21 says 1sec) */
46: #define XDC_MAXIOPB 31 /* max number of iopbs that can be active */
47: #define XDC_MAXTIME 4*1000000 /* four seconds before we give up and reset */
48: #define XDC_MAXTRIES 4 /* max number of times to retry an operation */
49: #define XDC_THROTTLE 32 /* dma throttle */
50: #define XDC_INTERLEAVE 0 /* interleave (for format param) */
51: #define XDC_DPARAM 0 /* dparam (drive param) XDDP_EC32 or 0 */
52:
53: /*
54: * xdc device interface
55: * (lives in VME address space)
56: */
57:
58: struct xdc {
59: volatile u_char filler0;
60: volatile u_char xdc_iopbaddr0; /* iopb byte 0 (LSB) */
61: volatile u_char filler1;
62: volatile u_char xdc_iopbaddr1; /* iopb byte 1 */
63: volatile u_char filler2;
64: volatile u_char xdc_iopbaddr2; /* iopb byte 2 */
65: volatile u_char filler3;
66: volatile u_char xdc_iopbaddr3; /* iopb byte 3 (MSB) */
67: volatile u_char filler4;
68: volatile u_char xdc_iopbamod; /* iopb address modifier */
69: volatile u_char filler5;
70: volatile u_char xdc_csr; /* control and status register */
71: volatile u_char filler6;
72: volatile u_char xdc_f_err; /* fatal error register */
73: };
74:
75: /*
76: * xdc_iopbamod: addressing modes
77: * When doing DMA, if the maximum address of the buffer is greater than
78: * 24 bits then you must use the 32 bit mode. Note that on many systems
79: * (e.g. sun-4/300) DVMA space is smaller than 24 bits, so there is no
80: * need for the 32 bit mode. However, the 32-bit mode hooks are in
81: * the driver in case it ever gets ported to an environment that needs it.
82: */
83:
84: #define XDC_ADDRMOD 0x3d /* standard address modifer, 24 bit max */
85: #define XDC_ADDRMOD32 0x0d /* 32 bit version above */
86:
87: /*
88: * xdc_csr
89: */
90:
91: #define XDC_RMAINTMD 0x80 /* reserved maintenance mode (write) */
92: #define XDC_BUSY 0x80 /* busy (read) */
93: #define XDC_F_ERROR 0x40 /* fatal error (read) */
94: #define XDC_MAINTMOD 0x20 /* maintenance mode (read/write) */
95: #define XDC_RESET 0x08 /* soft reset (read/write) */
96: #define XDC_ADDIOPB 0x04 /* add iopb/add pending (write) */
97: #define XDC_ADDING 0x04 /* iopb add is pending (read) */
98: #define XDC_CLRRIO 0x02 /* clear RIO (remove iopb) request (write) */
99: #define XDC_REMIOPB 0x02 /* remove iopb (read) */
100: #define XDC_RBUSYSEM 0x01 /* register busy semaphore (read/write) */
101:
102: /*
103: * Input/Output Parameter Block (iopb)
104: *
105: * all controller commands are done via iopb's. to start a command you
106: * must do this:
107: * [1] allocate space in DVMA space for the iopb
108: * [2] fill out all the fields of the iopb
109: * [3] check to see if controller can accept an iopb (XDC_ADDING bit clear)
110: * [4] put the DVMA address of the iopb in the xdc registers (in vme space)
111: * [5] set the XDC_ADDIOPB bit in the xdc csr
112: * [6] <command started>
113: *
114: * when the controller is done with a command it may interrupt (if you
115: * ask it to) and it will set the XDC_REMIOPB bit in the csr. the address
116: * of the finished iopb will be in the xdc registers. after that is
117: * read, set the XDC_CLRRIO to clear the iopb out of memory.
118: *
119: * the format of the iopb is described in section 4 of the manual.
120: */
121:
122: struct xd_iopb {
123: /* section 4.1.1: byte 0 */
124: volatile u_char errs:1; /* error summary bit, only valid if
125: "done" is set. must clear "done"
126: and "errs" bits before starting an
127: operation */
128: volatile u_char done:1; /* "done" bit */
129: volatile u_char chen:1; /* chain enable, "next iopb" is valid,
130: note xd returns one iopb at a time */
131: volatile u_char sgm:1; /* scatter/gather mode */
132: volatile u_char comm:4; /* command number (see table 4-2) */
133: #define XDCMD_NOP 0x0 /* no-op */
134: #define XDCMD_WR 0x1 /* write */
135: #define XDCMD_RD 0x2 /* read */
136: #define XDCMD_SK 0x3 /* seek */
137: #define XDCMD_RST 0x4 /* drive reset */
138: #define XDCMD_WRP 0x5 /* write params */
139: #define XDCMD_RDP 0x6 /* read params */
140: #define XDCMD_XWR 0x7 /* extended write */
141: #define XDCMD_XRD 0x8 /* extended read */
142: #define XDCMD_TST 0x9 /* diagnostic tests */
143: /* 0xa to 0xf are reserved */
144: /* section 4.1.2: byte 1 */
145: volatile u_char errno; /* status byte 1 (non-zero if error) */
146: /* section 4.1.3: byte 2 */
147: volatile u_char status; /* status byte 2 (see below) */
148: #define XDST_SR 0x40 /* slipped revolution */
149: #define XDST_CSE 0x20 /* count sectors executed */
150: #define XDST_WRPT 0x10 /* write protected drive */
151: #define XDST_DFLT 0x08 /* disk fault */
152: #define XDST_SKER 0x04 /* seek error: >max, or timeout */
153: #define XDST_ONCL 0x02 /* on-cylinder */
154: #define XDST_DRDY 0x01 /* drive is ready! */
155: /* section 4.1.4: byte 3 */
156: volatile u_char istat; /* internal status: reserved for xylogics */
157: /* section 4.1.5: byte 4 */
158: volatile u_char subfun; /* sub-function of command (see below) */
159: #define XDFUN_R 0x00 /* XDCMD_SK: report current addr */
160: #define XDFUN_SR 0x01 /* XDCMD_SK: seek and report addr */
161: #define XDFUN_SRI 0x02 /* XDCMD_SK: start seek, report comp imm */
162: #define XDFUN_CTL 0x00 /* XDCMD_{WRP,RDP}: controller params */
163: #define XDFUN_DRV 0x80 /* XDCMD_{WRP,RDP}: drive params */
164: #define XDFUN_FMT 0x81 /* XDCMD_{WRP,RDP}: format params,XWR form.*/
165: #define XDFUN_STX 0xa0 /* XDCMD_RDP: read drive status extended */
166: #define XDFUN_THD 0x80 /* XDCMD_{XWR,XRD}: track headers */
167: #define XDFUN_VFY 0x81 /* XDCMD_XRD: verify data */
168: #define XDFUN_HDR 0x82 /* XDCMD_{XWR,XRD}: header, verify,data, ecc*/
169: #define XDFUN_DM 0xa0 /* XDCMD_{XWR,XRD}: defect map */
170: #define XDFUN_DMX 0xa1 /* XDCMD_{XWR,XRD}: defect map extended */
171: /* section 4.1.6: byte 5 */
172: volatile u_char fixd:1; /* fixed media (vs removable) */
173: volatile u_char reserved1:4; /* reserved */
174: volatile u_char unit:3; /* unit number */
175: /* note: 6 to 13 are overloaded (see below) */
176: /* section 4.1.7: byte 6 */
177: volatile u_char lll:5; /* linked list length */
178: volatile u_char intl:3; /* interrupt level */
179: /* section 4.1.8: byte 7 */
180: volatile u_char intr_vec; /* interrupt vector */
181: /* section 4.1.9: bytes 8 and 9 */
182: volatile u_short sectcnt; /* sector count (# to xfer) */
183: /* section 4.1.10: byte a and b */
184: volatile u_short cylno; /* cylinder number */
185: /* section 4.1.11: byte c */
186: volatile u_char headno; /* head number */
187: /* section 4.1.12: byte d */
188: volatile u_char sectno; /* sector number */
189: /* section 4.1.13: byte e */
190: volatile u_char addrmod; /* addr modifier (bits 7,6 must be zero) */
191: /* section 4.1.14: byte f */
192: volatile u_char naddrmod; /* next (in chain) address iobp ad. modifer */
193: /* section 4.1.15: bytes 0x10 to 0x13 */
194: volatile u_long daddr; /* DMA data address */
195: /* section 4.1.16: bytes 0x14 to 0x17 */
196: volatile u_long nextiopb; /* next iopb (in chain) address */
197: /* section 4.1.17: bytes 0x18, 0x19 */
198: volatile u_short cksum; /* iopb checksum */
199: /* section 4.1.18: bytes 0x1a, 0x1b */
200: volatile u_short eccpattern; /* ECC pattern word (ecc mode 0) */
201: /* section 4.1.19: bytes 0x1c, 0x1d */
202: volatile u_short eccoffword; /* ECC offset word (ecc mode 0) */
203: };
204:
205: /*
206: * some commands overload bytes 6 to 0x13 of the iopb with different meanings.
207: * these commands include:
208: * section 4.2: controller parameters
209: * section 4.3: drive parameters
210: * sectino 4.4: format parameters
211: *
212: * note that the commands that overload the iopb are not part of the
213: * "critical data path" of the driver. so, we handle them by defining
214: * alternate iopb structures for these commands... it only costs us an
215: * extra pointer.
216: */
217:
218: /*
219: * controller parameters iopb: redefines bytes: 8 -> 0xe, 0x10 -> 0x13
220: */
221:
222: struct xd_iopb_ctrl {
223: volatile u_char same[8]; /* same as xd_iopb */
224: /* section 4.2.1: byte 8 */
225: volatile u_char param_a; /* param A (see below) */
226: #define XDPA_AUD 0x80 /* auto-update iopb fields when cmd done */
227: #define XDPA_TMOD 0x40 /* long-word transfer mode (vs word) */
228: #define XDPA_DACF 0x20 /* ignore vme ACFAIL signal */
229: #define XDPA_ICS 0x10 /* checksum check (adds 100usec per xfer) */
230: #define XDPA_EDT 0x08 /* enable on-board DMA timeout timer */
231: #define XDPA_NPRM 0x04 /* enable VME non-priv request mode */
232: /* rest must be zero */
233: /* section 4.2.2: byte 9 */
234: volatile u_char param_b; /* param B (see below) */
235: #define XDPB_TDT 0xc0 /* throttle dead time (see 8.11, below) */
236: #define XDPB_ROR 0x10 /* release on request */
237: #define XDPB_DRA 0x01 /* disable read ahead */
238: /* TDT values: */
239: #define XDPB_TDT_0USEC 0x00 /* no TDT */
240: #define XDPB_TDT_3_2USEC 0x40 /* 3.2 usec */
241: #define XDPB_TDT_6_4USEC 0x80 /* 6.4 usec */
242: #define XDPB_TDT_12_8USEC 0xc0 /* 12.8 usec */
243: /* section 4.2.3: byte a */
244: volatile u_char param_c; /* param C (see below) */
245: #define XDPC_OVS 0x80 /* over-lapped seek */
246: #define XDPC_COP 0x40 /* command optimiziation (elevator alg.) */
247: #define XDPC_ASR 0x10 /* auto-seek retry */
248: #define XDPC_RBC 0x04 /* retry before correction if ECC error */
249: #define XDPC_ECCM 0x03 /* ECC mode (0, 1, and 2) */
250: #define XDPC_ECC0 0x00 /* ECC mode 0 */
251: #define XDPC_ECC1 0x01 /* ECC mode 1 */
252: #define XDPC_ECC2 0x02 /* ECC mode 2 */
253: /* section 4.2.4: byte b */
254: volatile u_char throttle; /* max dma xfers per master (0==256) */
255: /* section 4.2.5: byte c */
256: volatile u_char eprom_lvl; /* EPROM release level */
257: volatile u_char delay; /* delay (see note below) */
258: /* section 4.2.6: byte e */
259: volatile u_char ctype; /* controller type */
260: #define XDCT_753 0x53 /* xylogic 753/7053 */
261: volatile u_char same2; /* byte f: same as xd_iopb */
262: /* section 4.2.7: byte 0x10, 0x11 */
263: volatile u_short eprom_partno; /* eprom part number */
264: /* section 4.2.8: byte 12 */
265: volatile u_char eprom_rev; /* eprom revision number */
266: };
267:
268: /*
269: * Note on byte 0xd ("delay"): This byte is not documented in the
270: * Xylogics manual. However, I contacted Xylogics and found out what
271: * it does. The controller sorts read commands into groups of
272: * contiguous sectors. After it processes a group of contiguous
273: * sectors rather than immediately going on to the next group of
274: * contiguous sectors, the controller can delay for a certain amount
275: * of time in hopes of getting another cluster of reads in the same
276: * area of the disk (thus avoiding a long seek). Byte 0xd controls
277: * how long it waits before giving up and going on and doing the next
278: * contiguous cluster.
279: *
280: * it is unclear what unit the delay is in, but it looks like sun
281: * uses the value "20" for sun3's, and "0" for sparc, except for the
282: * 4/300 (where it is "4"). [see /sys/sundev/xd_conf.c on any 4.1.3
283: * machine for how sun configures its controller...]
284: */
285:
286: #define XDC_DELAY_SUN3 20
287: #define XDC_DELAY_4_300 4
288: #define XDC_DELAY_SPARC 0
289:
290: /*
291: * drive parameters iopb: redefines bytes: 6, 8, 9, a, b, c, d, e
292: */
293:
294: struct xd_iopb_drive {
295: volatile u_char same[6]; /* same as xd_iopb */
296: /* section 4.3.1: byte 6 */
297: volatile u_char dparam_ipl; /* drive params | interrupt level */
298: #define XDDP_EC32 0x10 /* 32 bit ECC mode */
299: volatile u_char same1; /* byte 7: same */
300: /* section 4.3.2: byte 8 */
301: volatile u_char maxsect; /* max sector/last head (<= byte d) */
302: /* section 4.3.3: byte 9 */
303: volatile u_char headoff; /* head offset */
304: /* section 4.3.4: bytes 0xa, 0xb */
305: volatile u_short maxcyl; /* max cyl (zero based!) */
306: /* section 4.3.5: byte 0xc */
307: volatile u_char maxhead; /* max head (zero based!) */
308: /* section 4.3.6: byte 0xd */
309: volatile u_char maxsector; /* max sector of disk (zero based!) */
310: /* section 4.3.7: byte 0xe */
311: volatile u_char sectpertrk; /* sectors per track, not zero base, no runt*/
312: };
313:
314: /*
315: * format parameters iopb: redefines bytes: 6, 8, 9, a, b, c, d, 0x10, 0x11
316: */
317:
318: struct xd_iopb_format {
319: volatile u_char same[6]; /* smae as xd_iopb */
320: /* section 4.4.1: byte 6 */
321: volatile u_char interleave_ipl;/* (interleave << 4) | interrupt level */
322: /* interleave ratio 1:1 to 16:1 */
323: volatile u_char same1; /* byte 7: same */
324: /* section 4.4.2: byte 8 */
325: volatile u_char field1; /* >= 1, xylogic says should be 1 */
326: #define XDFM_FIELD1 0x01 /* xylogic value */
327: /* section 4.4.3: byte 9 */
328: volatile u_char field2; /* >0, field1+field2 <= 255 */
329: #define XDFM_FIELD2 0x0a /* xylogic value */
330: /* section 4.4.4: byte a */
331: volatile u_char field3; /* >= field1+field2 */
332: #define XDFM_FIELD3 0x1b /* xylogic value */
333: /* section 4.4.5: byte b */
334: volatile u_char field4; /* field4 */
335: #define XDFM_FIELD4 0x14 /* xylogic value */
336: /* section 4.4.6: bytes 0xc, 0xd */
337: volatile u_short bytespersec; /* bytes per sector */
338: #define XDFM_BPS 0x200 /* must be 512! */
339: volatile u_char same2[2]; /* bytes e, f */
340: /* section 4.4.7: byte 0x10 */
341: volatile u_char field6; /* field 6 */
342: #define XDFM_FIELD6 0x0a /* xylogic value */
343: /* section 4.4.8: byte 0x11 */
344: volatile u_char field7; /* field 7, >= 1 */
345: #define XDFM_FIELD7 0x03 /* xylogic value */
346: };
347:
348:
349: /*
350: * errors: errors come from either the fatal error register or the
351: * iopb
352: */
353:
354: #define XD_ERA_MASK 0xf0 /* error action mask */
355: #define XD_ERA_PROG 0x10 /* program error */
356: #define XD_ERA_PRG2 0x20 /* program error */
357: #define XD_ERA_SOFT 0x30 /* soft error: we recovered */
358: #define XD_ERA_HARD 0x40 /* hard error: retry */
359: #define XD_ERA_RSET 0x60 /* hard error: reset, then retry */
360: #define XD_ERA_WPRO 0x90 /* write protected */
361:
362: /* software error codes */
363: #define XD_ERR_FAIL 0xff /* general total failure */
364: /* no error */
365: #define XD_ERR_AOK 0x00 /* success */
366: /* non-retryable programming error */
367: #define XD_ERR_ICYL 0x10 /* illegal cyl */
368: #define XD_ERR_IHD 0x11 /* illegal head */
369: #define XD_ERR_ISEC 0x12 /* illegal sector */
370: #define XD_ERR_CZER 0x13 /* count zero */
371: #define XD_ERR_UIMP 0x14 /* unknown command */
372: #define XD_ERR_IF1 0x15 /* illegal field 1 */
373: #define XD_ERR_IF2 0x16 /* illegal field 2 */
374: #define XD_ERR_IF3 0x17 /* illegal field 3 */
375: #define XD_ERR_IF4 0x18 /* illegal field 4 */
376: #define XD_ERR_IF5 0x19 /* illegal field 5 */
377: #define XD_ERR_IF6 0x1a /* illegal field 6 */
378: #define XD_ERR_IF7 0x1b /* illegal field 7 */
379: #define XD_ERR_ISG 0x1c /* illegal scatter/gather */
380: #define XD_ERR_ISPT 0x1d /* not enough sectors per track */
381: #define XD_ERR_ALGN 0x1e /* next iopb allignment error */
382: #define XD_ERR_SGAL 0x1f /* scatter gather address alignment error */
383: #define XD_ERR_SGEC 0x20 /* scatter gather with auto ECC */
384: /* successfully recovered soft errors */
385: #define XD_ERR_SECC 0x30 /* soft ecc corrected */
386: #define XD_ERR_SIGN 0x31 /* ecc ignored */
387: #define XD_ERR_ASEK 0x32 /* auto-seek retry recovered */
388: #define XD_ERR_RTRY 0x33 /* soft retry recovered */
389: /* hard errors: please retry */
390: #define XD_ERR_HECC 0x40 /* hard data ECC */
391: #define XD_ERR_NHDR 0x41 /* header not found */
392: #define XD_ERR_NRDY 0x42 /* drive not ready */
393: #define XD_ERR_TOUT 0x43 /* timeout */
394: #define XD_ERR_VTIM 0x44 /* VME DMA timeout */
395: #define XD_ERR_DSEQ 0x45 /* disk sequencer error */
396: #define XD_ERR_HDEC 0x48 /* header ECC error */
397: #define XD_ERR_RVFY 0x49 /* ready verify */
398: #define XD_ERR_VFER 0x4a /* fatal VME DMA error */
399: #define XD_ERR_VBUS 0x4b /* VME bus error */
400: /* hard error: reset and retry */
401: #define XD_ERR_DFLT 0x60 /* drive fault */
402: #define XD_ERR_HECY 0x61 /* header error/cyl */
403: #define XD_ERR_HEHD 0x62 /* header error/head */
404: #define XD_ERR_NOCY 0x63 /* not on cylinder */
405: #define XD_ERR_SEEK 0x64 /* seek error */
406: /* fatal hardware error */
407: #define XD_ERR_ILSS 0x70 /* illegal sector size */
408: /* misc */
409: #define XD_ERR_SEC 0x80 /* soft ecc */
410: /* requires manual intervention */
411: #define XD_ERR_WPER 0x90 /* write protected */
412: /* FATAL errors */
413: #define XD_ERR_IRAM 0xe1 /* IRAM self test failed */
414: #define XD_ERR_MT3 0xe3 /* maint test 3 failed (DSKCEL RAM) */
415: #define XD_ERR_MT4 0xe4 /* maint test 4 failed (Header shift reg) */
416: #define XD_ERR_MT5 0xe5 /* maint test 5 failed (VMEDMA regs) */
417: #define XD_ERR_MT6 0xe6 /* maint test 6 failed (REGCEL chip) */
418: #define XD_ERR_MT7 0xe7 /* maint test 7 failed (buff. parity) */
419: #define XD_ERR_MT8 0xe8 /* maint test 8 failed (fifo) */
420: #define XD_ERR_IOCK 0xf0 /* iopb checksume miscompare */
421: #define XD_ERR_IODM 0xf1 /* iopb dma fatal */
422: #define XD_ERR_IOAL 0xf2 /* iopb allignment error */
423: #define XD_ERR_FIRM 0xf3 /* firmware error n*/
424: #define XD_ERR_MMOD 0xf5 /* illegal maint mode test number */
425: #define XD_ERR_ACFL 0xf6 /* ACFAIL asserted */
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