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Annotation of sys/arch/sparc/dev/xboxreg.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: xboxreg.h,v 1.2 2003/06/02 18:40:59 jason Exp $       */
                      2:
                      3: /*
                      4:  * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
                      5:  * All rights reserved.
                      6:  *
                      7:  * Redistribution and use in source and binary forms, with or without
                      8:  * modification, are permitted provided that the following conditions
                      9:  * are met:
                     10:  * 1. Redistributions of source code must retain the above copyright
                     11:  *    notice, this list of conditions and the following disclaimer.
                     12:  * 2. Redistributions in binary form must reproduce the above copyright
                     13:  *    notice, this list of conditions and the following disclaimer in the
                     14:  *    documentation and/or other materials provided with the distribution.
                     15:  *
                     16:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     17:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
                     18:  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
                     19:  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
                     20:  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
                     21:  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
                     22:  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
                     23:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
                     24:  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
                     25:  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     26:  * POSSIBILITY OF SUCH DAMAGE.
                     27:  */
                     28:
                     29: struct xbox_errs {
                     30:        volatile        u_int32_t xe_errd;      /* error descriptor */
                     31:        volatile        u_int32_t xe_errva;     /* error virtual addr */
                     32:        volatile        u_int32_t xe_stat;      /* status */
                     33:        volatile        u_int32_t xe_ctl0;      /* control reg 0 */
                     34: };
                     35:
                     36: struct xbox_regs {
                     37:        /* XA space */
                     38:        volatile        u_int32_t *xa_write0;   /* write0 reg */
                     39:        struct          xbox_errs *xa_errs;     /* errors */
                     40:        volatile        u_int32_t *xa_ctl0;     /* ctl0 reg */
                     41:        volatile        u_int32_t *xa_ctl1;     /* ctl1 reg */
                     42:        volatile        u_int32_t *xa_elua;
                     43:        volatile        u_int32_t *xa_ella;
                     44:        volatile        u_int32_t *xa_rsrv;     /* reserved */
                     45:
                     46:        /* XB space */
                     47:        struct          xbox_errs *xb_errs;     /* errors */
                     48:        volatile        u_int32_t *xb_ctl0;     /* ctl0 reg */
                     49:        volatile        u_int32_t *xb_ctl1;     /* ctl1 reg */
                     50:        volatile        u_int32_t *xb_elua;
                     51:        volatile        u_int32_t *xb_ella;
                     52:        volatile        u_int32_t *xb_rsrv;     /* reserved */
                     53: };
                     54:
                     55: #define        XAC_CTL0_OFFSET         0x100000        /* control reg 0 */
                     56: #define        XAC_CTL1_OFFSET         0x110000        /* control reg 1 */
                     57: #define        XAC_ELUA_OFFSET         0x120000
                     58: #define        XAC_ELLA_OFFSET         0x130000
                     59: #define        XAC_ERR_EN_OFFSET       0x140000        /* error enable */
                     60:
                     61: #define        XBC_CTL0_OFFSET         0x500000        /* control reg 0 */
                     62: #define        XBC_CTL1_OFFSET         0x510000        /* control reg 1 */
                     63: #define        XBC_ELUA_OFFSET         0x520000
                     64: #define        XBC_ELLA_OFFSET         0x530000
                     65: #define        XBC_ERR_EN_OFFSET       0x540000        /* error enable */
                     66:
                     67:
                     68: /*
                     69:  * Control register 1
                     70:  */
                     71: #define        XBOX_CTL1_CDPTE1        0x8000  /* cable data parity test enb */
                     72: #define        XBOX_CTL1_CRTE          0x4000  /* cable rerun test enb */
                     73: #define        XBOX_CTL1_SRST          0x3000  /* software reset mask */
                     74: #define        XBOX_CTL1_SRST_XARS     0x1000
                     75: #define        XBOX_CTL1_SRST_CRES     0x2000
                     76: #define        XBOX_CTL1_SRST_HRES     0x3000
                     77: #define        XBOX_CTL1_DTE           0x0800  /* dvma test enb */
                     78: #define        XBOX_CTL1_CDPTE         0x0400  /* cable data parity test enb */
                     79: #define        XBOX_CTL1_ITE           0x0200  /* interrupt test enb */
                     80: #define        XBOX_CTL1_CDPTE0        0x0100  /* cable data parity test enb, dpr0 */
                     81: #define        XBOX_CTL1_ELDS          0x00c0  /* error log dvma size */
                     82: #define        XBOX_CTL1_XSSE          0x0020  /* expansion sbus slot select enb */
                     83: #define        XBOX_CTL1_XSBRE         0x0010  /* expansion sbus bus request enb */
                     84: #define        XBOX_CTL1_XSIE          0x0008  /* expansion sbus interrupt enb */
                     85: #define        XBOX_CTL1_ELDE          0x0004  /* error log dvma enable */
                     86: #define        XBOX_CTL1_CSIE          0x0002  /* cable serial interrupt enb */
                     87: #define        XBOX_CTL1_TRANSPARENT   0x0001  /* transparent mode enb */