Annotation of sys/arch/sparc/dev/tcxreg.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: tcxreg.h,v 1.4 2003/06/06 19:42:47 miod Exp $ */
! 2: /* $NetBSD: tcxreg.h,v 1.1 1996/06/19 13:17:35 pk Exp $ */
! 3:
! 4: /*
! 5: * Copyright (c) 1996 The NetBSD Foundation, Inc.
! 6: * All rights reserved.
! 7: *
! 8: * This code is derived from software contributed to The NetBSD Foundation
! 9: * by Paul Kranenburg.
! 10: *
! 11: * Redistribution and use in source and binary forms, with or without
! 12: * modification, are permitted provided that the following conditions
! 13: * are met:
! 14: * 1. Redistributions of source code must retain the above copyright
! 15: * notice, this list of conditions and the following disclaimer.
! 16: * 2. Redistributions in binary form must reproduce the above copyright
! 17: * notice, this list of conditions and the following disclaimer in the
! 18: * documentation and/or other materials provided with the distribution.
! 19: * 3. All advertising materials mentioning features or use of this software
! 20: * must display the following acknowledgement:
! 21: * This product includes software developed by the NetBSD
! 22: * Foundation, Inc. and its contributors.
! 23: * 4. Neither the name of The NetBSD Foundation nor the names of its
! 24: * contributors may be used to endorse or promote products derived
! 25: * from this software without specific prior written permission.
! 26: *
! 27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE
! 31: * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 37: * POSSIBILITY OF SUCH DAMAGE.
! 38: */
! 39:
! 40: /*
! 41: * A TCX is composed of numerous groups of control registers, all with TLAs:
! 42: * DHC - ???
! 43: * TEC - transform engine control?
! 44: * THC - TEC Hardware Configuration
! 45: * ROM - a 128Kbyte ROM with who knows what in it.
! 46: * STIP - ???
! 47: * RSTIP - Raw ???
! 48: * BLIT - ???
! 49: * RBLIT - Raw ???
! 50: * ALT - ???
! 51: * colormap - see below
! 52: * frame buffer memory (video RAM)
! 53: * possible other stuff
! 54: *
! 55: */
! 56: #define TCX_REG_DFB8 0
! 57: #define TCX_REG_DFB24 1
! 58: #define TCX_REG_STIP 2
! 59: #define TCX_REG_BLIT 3
! 60: #define TCX_REG_RDFB32 4
! 61: #define TCX_REG_RSTIP 5
! 62: #define TCX_REG_RBLIT 6
! 63: #define TCX_REG_TEC 7
! 64: #define TCX_REG_CMAP 8
! 65: #define TCX_REG_THC 9
! 66: #define TCX_REG_ROM 10
! 67: #define TCX_REG_DHC 11
! 68: #define TCX_REG_ALT 12
! 69:
! 70: #define TCX_NREG 13
! 71:
! 72:
! 73: /*
! 74: * The layout of the THC.
! 75: */
! 76: struct tcx_thc {
! 77: u_int32_t thc_config;
! 78: u_int32_t thc_xxx1[31];
! 79: u_int32_t thc_sensebus;
! 80: u_int32_t thc_xxx2[3];
! 81: u_int32_t thc_delay;
! 82: u_int32_t thc_strapping;
! 83: u_int32_t thc_xxx3[1];
! 84: u_int32_t thc_linecount;
! 85: u_int32_t thc_xxx4[478];
! 86: u_int32_t thc_hcmisc;
! 87: u_int32_t thc_xxx5[56];
! 88: u_int32_t thc_cursoraddr;
! 89: u_int32_t thc_cursorAdata[32];
! 90: u_int32_t thc_cursorBdata[32];
! 91:
! 92: };
! 93:
! 94: /* cursor x/y position for 'off' */
! 95: #define THC_CURSOFF ((65536-32) | ((65536-32) << 16))
! 96:
! 97: /* bits in thc_config ??? */
! 98: #define THC_CFG_FBID 0xf0000000 /* id mask */
! 99: #define THC_CFG_FBID_SHIFT 28
! 100: #define THC_CFG_SENSE 0x07000000 /* sense mask */
! 101: #define THC_CFG_SENSE_SHIFT 24
! 102: #define THC_CFG_REV 0x00f00000 /* revision mask */
! 103: #define THC_CFG_REV_SHIFT 20
! 104: #define THC_CFG_RST 0x00008000 /* reset */
! 105:
! 106: /* bits in thc_hcmisc */
! 107: #define THC_MISC_OPENFLG 0x80000000 /* open flag (what's that?) */
! 108: #define THC_MISC_SWERR_EN 0x20000000 /* enable SW error interrupt */
! 109: #define THC_MISC_VSYNC_LEVEL 0x08000000 /* vsync level when disabled */
! 110: #define THC_MISC_HSYNC_LEVEL 0x04000000 /* hsync level when disabled */
! 111: #define THC_MISC_VSYNC_DISABLE 0x02000000 /* vsync disable */
! 112: #define THC_MISC_HSYNC_DISABLE 0x01000000 /* hsync disable */
! 113: #define THC_MISC_RESET 0x00001000 /* reset */
! 114: #define THC_MISC_VIDEN 0x00000400 /* video enable */
! 115: #define THC_MISC_SYNC 0x00000200 /* not sure what ... */
! 116: #define THC_MISC_VSYNC 0x00000100 /* ... these really are */
! 117: #define THC_MISC_SYNCEN 0x00000080 /* sync enable */
! 118: #define THC_MISC_CURSRES 0x00000040 /* cursor resolution */
! 119: #define THC_MISC_INTEN 0x00000020 /* v.retrace intr enable */
! 120: #define THC_MISC_INTR 0x00000010 /* intr pending / ack */
! 121: #define THC_MISC_DACWAIT 0x0000000f /* cycles before transfer */
! 122:
! 123: /*
! 124: * Partial description of TEC.
! 125: */
! 126: struct tcx_tec {
! 127: u_int32_t tec_config; /* what's in it? */
! 128: u_int32_t tec_xxx0[35];
! 129: u_int32_t tec_delay; /* */
! 130: #define TEC_DELAY_SYNC 0x00000f00
! 131: #define TEC_DELAY_WR_F 0x000000c0 /* wr falling */
! 132: #define TEC_DELAY_WR_R 0x00000030 /* wr rising */
! 133: #define TEC_DELAY_SOE_F 0x0000000c /* soe falling */
! 134: #define TEC_DELAY_SOE_S 0x00000003 /* soe sclk */
! 135: u_int32_t tec_strapping; /* */
! 136: #define TEC_STRAP_FIFO_LIMIT 0x00f00000
! 137: #define TEC_STRAP_CACHE_EN 0x00010000
! 138: #define TEC_STRAP_ZERO_OFFSET 0x00008000
! 139: #define TEC_STRAP_REFRSH_DIS 0x00004000
! 140: #define TEC_STRAP_REF_LOAD 0x00001000
! 141: #define TEC_STRAP_REFRSH_PERIOD 0x000003ff
! 142: u_int32_t tec_hcmisc; /* */
! 143: u_int32_t tec_linecount; /* */
! 144: u_int32_t tec_hss; /* */
! 145: u_int32_t tec_hse; /* */
! 146: u_int32_t tec_hds; /* */
! 147: u_int32_t tec_hsedvs; /* */
! 148: u_int32_t tec_hde; /* */
! 149: u_int32_t tec_vss; /* */
! 150: u_int32_t tec_vse; /* */
! 151: u_int32_t tec_vds; /* */
! 152: u_int32_t tec_vde; /* */
! 153: };
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