Annotation of sys/arch/sparc/dev/sbusreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: sbusreg.h,v 1.5 2007/05/29 09:54:15 sobrado Exp $ */
2: /* $NetBSD: sbusreg.h,v 1.3 1997/09/14 19:17:25 pk Exp $ */
3:
4: /*
5: * Copyright (c) 1992, 1993
6: * The Regents of the University of California. All rights reserved.
7: *
8: * This software was developed by the Computer Systems Engineering group
9: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10: * contributed to Berkeley.
11: *
12: * All advertising materials mentioning features or use of this software
13: * must display the following acknowledgement:
14: * This product includes software developed by the University of
15: * California, Lawrence Berkeley Laboratory.
16: *
17: * Redistribution and use in source and binary forms, with or without
18: * modification, are permitted provided that the following conditions
19: * are met:
20: * 1. Redistributions of source code must retain the above copyright
21: * notice, this list of conditions and the following disclaimer.
22: * 2. Redistributions in binary form must reproduce the above copyright
23: * notice, this list of conditions and the following disclaimer in the
24: * documentation and/or other materials provided with the distribution.
25: * 3. Neither the name of the University nor the names of its contributors
26: * may be used to endorse or promote products derived from this software
27: * without specific prior written permission.
28: *
29: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39: * SUCH DAMAGE.
40: *
41: * @(#)sbusreg.h 8.1 (Berkeley) 6/11/93
42: */
43:
44: /*
45: * Sun-4c S-bus definitions. (Should be made generic!)
46: *
47: * SBus slot 0 is not a separate slot; it talks to the onboard I/O devices.
48: * It is, however, addressed just like any `real' SBus.
49: *
50: * SBus device addresses are obtained from the FORTH PROMs. They come
51: * in `absolute' and `relative' address flavors, so we have to handle both.
52: * Relative addresses do *not* include the slot number.
53: */
54: #define SBUS_BASE 0xf8000000
55: #define SBUS_ADDR(slot, off) (SBUS_BASE + ((slot) << 25) + (off))
56: #define SBUS_ABS(a) ((unsigned)(a) >= SBUS_BASE)
57: #define SBUS_ABS_TO_SLOT(a) (((a) - SBUS_BASE) >> 25)
58: #define SBUS_ABS_TO_OFFSET(a) (((a) - SBUS_BASE) & 0x1ffffff)
59:
60: struct sbusreg {
61: u_int32_t sbus_afsr; /* M-to-S Asynchronous Fault Status */
62: u_int32_t sbus_afar; /* M-to-S Asynchronous Fault Address */
63: u_int32_t sbus_arbiter; /* Arbiter Enable */
64: u_int32_t sbus_reserved1;
65:
66: #define NSBUSCFG 20
67: /* Actual number dependent on machine model */
68: u_int32_t sbus_sbuscfg[NSBUSCFG]; /* SBus configuration control */
69: };
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