![[BACK]](/icons/back.gif){kind=icon}
Return to magma.c CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / arch / sparc / dev|
Return to magma.c CVS log | Up to [local] / sys / arch / sparc / dev |
1.1 nbrk 1: /* $OpenBSD: magma.c,v 1.19 2004/11/02 21:16:10 miod Exp $ */
2: /*
3: * magma.c
4: *
5: * Copyright (c) 1998 Iain Hibbert
6: * All rights reserved.
7: *
8: * Redistribution and use in source and binary forms, with or without
9: * modification, are permitted provided that the following conditions
10: * are met:
11: * 1. Redistributions of source code must retain the above copyright
12: * notice, this list of conditions and the following disclaimer.
13: * 2. Redistributions in binary form must reproduce the above copyright
14: * notice, this list of conditions and the following disclaimer in the
15: * documentation and/or other materials provided with the distribution.
16: * 3. All advertising materials mentioning features or use of this software
17: * must display the following acknowledgement:
18: * This product includes software developed by Iain Hibbert
19: * 4. The name of the author may not be used to endorse or promote products
20: * derived from this software without specific prior written permission.
21: *
22: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32: *
33: */
34:
35: /*
36: * Driver for Magma SBus Serial/Parallel cards using the Cirrus Logic
37: * CD1400 & CD1190 chips
38: */
39:
40: #include "magma.h"
41:
42: #include <sys/param.h>
43: #include <sys/systm.h>
44: #include <sys/proc.h>
45: #include <sys/device.h>
46: #include <sys/file.h>
47: #include <sys/ioctl.h>
48: #include <sys/malloc.h>
49: #include <sys/tty.h>
50: #include <sys/time.h>
51: #include <sys/kernel.h>
52: #include <sys/syslog.h>
53: #include <sys/conf.h>
54: #include <sys/errno.h>
55:
56: #include <sparc/autoconf.h>
57: #include <sparc/conf.h>
58: #include <sparc/cpu.h>
59: #include <sparc/ctlreg.h>
60:
61: #include <sparc/sparc/asm.h>
62:
63: #include <dev/ic/cd1400reg.h>
64: #include <dev/ic/cd1190reg.h>
65:
66: #include <sparc/bppioctl.h>
67: #include <sparc/dev/magmareg.h>
68:
69: /*
70: * Select tty soft interrupt bit based on TTY ipl. (stolen from zs.c)
71: */
72: #if IPL_TTY == 1
73: # define IE_MSOFT IE_L1
74: #elif IPL_TTY == 4
75: # define IE_MSOFT IE_L4
76: #elif IPL_TTY == 6
77: # define IE_MSOFT IE_L6
78: #else
79: # error "no suitable software interrupt bit"
80: #endif
81:
82: #ifdef MAGMA_DEBUG
83: #define dprintf(x) printf x
84: #else
85: #define dprintf(x)
86: #endif
87:
88: /*
89: * Supported cards table.
90: *
91: * The table below lists the cards that this driver is likely to
92: * be able to support.
93: *
94: * Cards with parallel ports: except for the LC2+1Sp, they all use
95: * the CD1190 chip which I know nothing about. I've tried to leave
96: * hooks for it so it shouldn't be too hard to add support later.
97: * (I think somebody is working on this separately)
98: *
99: * Thanks to Bruce at Magma for telling me the hardware offsets.
100: */
101: static const struct magma_board_info supported_cards[] = {
102: {
103: "MAGMA_Sp", "MAGMA,4_Sp", "Magma 4 Sp", 4, 0,
104: 1, 0xa000, 0xc000, 0xe000, { 0x8000, 0, 0, 0 },
105: 0, { 0, 0 }
106: },
107: {
108: "MAGMA_Sp", "MAGMA,8_Sp", "Magma 8 Sp", 8, 0,
109: 2, 0xa000, 0xc000, 0xe000, { 0x4000, 0x6000, 0, 0 },
110: 0, { 0, 0 }
111: },
112: {
113: "MAGMA_Sp", "MAGMA,_8HS_Sp", "Magma Fast 8 Sp", 8, 0,
114: 2, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0, 0 },
115: 0, { 0, 0 }
116: },
117: {
118: "MAGMA_Sp", "MAGMA,_8SP_422", "Magma 8 Sp - 422", 8, 0,
119: 2, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0, 0 },
120: 0, { 0, 0 }
121: },
122: {
123: "MAGMA_Sp", "MAGMA,12_Sp", "Magma 12 Sp", 12, 0,
124: 3, 0xa000, 0xc000, 0xe000, { 0x2000, 0x4000, 0x6000, 0 },
125: 0, { 0, 0 }
126: },
127: {
128: "MAGMA_Sp", "MAGMA,16_Sp", "Magma 16 Sp", 16, 0,
129: 4, 0xd000, 0xe000, 0xf000, { 0x8000, 0x9000, 0xa000, 0xb000 },
130: 0, { 0, 0 }
131: },
132: {
133: "MAGMA_Sp", "MAGMA,16_Sp_2", "Magma 16 Sp", 16, 0,
134: 4, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0xc000, 0xe000 },
135: 0, { 0, 0 }
136: },
137: {
138: "MAGMA_Sp", "MAGMA,16HS_Sp", "Magma Fast 16 Sp", 16, 0,
139: 4, 0x2000, 0x4000, 0x6000, { 0x8000, 0xa000, 0xc000, 0xe000 },
140: 0, { 0, 0 }
141: },
142: {
143: "MAGMA_Sp", "MAGMA,21_Sp", "Magma LC 2+1 Sp", 2, 1,
144: 1, 0xa000, 0xc000, 0xe000, { 0x8000, 0, 0, 0 },
145: 0, { 0, 0 }
146: },
147: {
148: "MAGMA_Sp", "MAGMA,21HS_Sp", "Magma 2+1 Sp", 2, 1,
149: 1, 0xa000, 0xc000, 0xe000, { 0x4000, 0, 0, 0 },
150: 1, { 0x6000, 0 }
151: },
152: {
153: "MAGMA_Sp", "MAGMA,41_Sp", "Magma 4+1 Sp", 4, 1,
154: 1, 0xa000, 0xc000, 0xe000, { 0x4000, 0, 0, 0 },
155: 1, { 0x6000, 0 }
156: },
157: {
158: "MAGMA_Sp", "MAGMA,82_Sp", "Magma 8+2 Sp", 8, 2,
159: 2, 0xd000, 0xe000, 0xf000, { 0x8000, 0x9000, 0, 0 },
160: 2, { 0xa000, 0xb000 }
161: },
162: {
163: "MAGMA_Sp", "MAGMA,P1_Sp", "Magma P1 Sp", 0, 1,
164: 0, 0, 0, 0, { 0, 0, 0, 0 },
165: 1, { 0x8000, 0 }
166: },
167: {
168: "MAGMA_Sp", "MAGMA,P2_Sp", "Magma P2 Sp", 0, 2,
169: 0, 0, 0, 0, { 0, 0, 0, 0 },
170: 2, { 0x4000, 0x8000 }
171: },
172: {
173: "MAGMA 2+1HS Sp", "", "Magma 2+1HS Sp", 2, 0,
174: 1, 0xa000, 0xc000, 0xe000, { 0x4000, 0, 0, 0 },
175: 1, { 0x8000, 0 }
176: },
177: {
178: NULL, NULL, NULL, 0, 0,
179: 0, 0, 0, 0, { 0, 0, 0, 0 },
180: 0, { 0, 0 }
181: }
182: };
183:
184: /************************************************************************
185: *
186: * Autoconfig Stuff
187: */
188:
189: struct cfattach magma_ca = {
190: sizeof(struct magma_softc), magma_match, magma_attach
191: };
192:
193: struct cfdriver magma_cd = {
194: NULL, "magma", DV_DULL
195: };
196:
197: struct cfattach mtty_ca = {
198: sizeof(struct mtty_softc), mtty_match, mtty_attach
199: };
200:
201: struct cfdriver mtty_cd = {
202: NULL, "mtty", DV_TTY
203: };
204:
205: struct cfattach mbpp_ca = {
206: sizeof(struct mbpp_softc), mbpp_match, mbpp_attach
207: };
208:
209: struct cfdriver mbpp_cd = {
210: NULL, "mbpp", DV_DULL
211: };
212:
213: /************************************************************************
214: *
215: * CD1400 Routines
216: *
217: * cd1400_compute_baud calculate COR/BPR register values
218: * cd1400_write_ccr write a value to CD1400 ccr
219: * cd1400_read_reg read from a CD1400 register
220: * cd1400_write_reg write to a CD1400 register
221: * cd1400_enable_transmitter enable transmitting on CD1400 channel
222: */
223:
224: /*
225: * compute the bpr/cor pair for any baud rate
226: * returns 0 for success, 1 for failure
227: */
228: int
229: cd1400_compute_baud(speed, clock, cor, bpr)
230: speed_t speed;
231: int clock;
232: int *cor, *bpr;
233: {
234: int c, co, br;
235:
236: if (speed < 50 || speed > 150000)
237: return (1);
238:
239: for (c = 0, co = 8 ; co <= 2048 ; co <<= 2, c++) {
240: br = ((clock * 1000000) + (co * speed) / 2) / (co * speed);
241: if (br < 0x100) {
242: *bpr = br;
243: *cor = c;
244: return (0);
245: }
246: }
247:
248: return (1);
249: }
250:
251: /*
252: * Write a CD1400 channel command, should have a timeout?
253: */
254: __inline void
255: cd1400_write_ccr(cd, cmd)
256: struct cd1400 *cd;
257: u_char cmd;
258: {
259: while (cd1400_read_reg(cd, CD1400_CCR))
260: ;
261:
262: cd1400_write_reg(cd, CD1400_CCR, cmd);
263: }
264:
265: /*
266: * read a value from a cd1400 register
267: */
268: __inline u_char
269: cd1400_read_reg(cd, reg)
270: struct cd1400 *cd;
271: int reg;
272: {
273: return (cd->cd_reg[reg]);
274: }
275:
276: /*
277: * write a value to a cd1400 register
278: */
279: __inline void
280: cd1400_write_reg(cd, reg, value)
281: struct cd1400 *cd;
282: int reg;
283: u_char value;
284: {
285: cd->cd_reg[reg] = value;
286: }
287:
288: /*
289: * enable transmit service requests for cd1400 channel
290: */
291: void
292: cd1400_enable_transmitter(cd, channel)
293: struct cd1400 *cd;
294: int channel;
295: {
296: register int s, srer;
297:
298: s = spltty();
299: cd1400_write_reg(cd, CD1400_CAR, channel);
300: srer = cd1400_read_reg(cd, CD1400_SRER);
301: SET(srer, CD1400_SRER_TXRDY);
302: cd1400_write_reg(cd, CD1400_SRER, srer);
303: splx(s);
304: }
305:
306: /************************************************************************
307: *
308: * CD1190 Routines
309: */
310:
311: /* XXX well, there are none yet */
312:
313: /************************************************************************
314: *
315: * Magma Routines
316: *
317: * magma_match reports if we have a magma board available
318: * magma_attach attaches magma boards to the sbus
319: * magma_hard hardware level interrupt routine
320: * magma_soft software level interrupt routine
321: */
322:
323: int
324: magma_match(parent, vcf, args)
325: struct device *parent;
326: void *vcf, *args;
327: {
328: struct confargs *ca = args;
329: struct romaux *ra = &ca->ca_ra;
330: const struct magma_board_info *card;
331:
332: for (card = supported_cards; ; card++) {
333: if (card->mb_sbusname == NULL)
334: /* End of table: no match */
335: return (0);
336: if (strcmp(ra->ra_name, card->mb_sbusname) == 0)
337: break;
338: }
339:
340: #if defined(MAGMA_DEBUG)
341: {
342: int i;
343:
344: printf("magma: matched `%s', nvaddrs %d, nreg %d, nintr %d\n",
345: ra->ra_name, ra->ra_nvaddrs, ra->ra_nreg, ra->ra_nintr);
346: printf("magma: magma_prom `%s'\n",
347: getpropstring(ra->ra_node, "magma_prom"));
348: printf("magma: intlevels `%s'\n",
349: getpropstring(ra->ra_node, "intlevels"));
350: printf("magma: chiprev `%s'\n",
351: getpropstring(ra->ra_node, "chiprev"));
352: printf("magma: clock `%s'\n",
353: getpropstring(ra->ra_node, "clock"));
354:
355: for (i = 0 ; i < ra->ra_nreg ; i++)
356: printf("magma: reg %d; ra_iospace = %d, ra_paddr = 0x%x, ra_len = %d\n",
357: i, ra->ra_reg[i].rr_iospace,
358: (int)ra->ra_reg[i].rr_paddr, ra->ra_reg[i].rr_len);
359: for (i = 0 ; i < ra->ra_nintr ; i++)
360: printf("magma: intr %d; pri = %d, vec = %d\n",
361: i, ra->ra_intr[i].int_pri, ra->ra_intr[i].int_vec);
362: }
363: #endif
364:
365: return (1);
366: }
367:
368: void
369: magma_attach(parent, dev, args)
370: struct device *parent;
371: struct device *dev;
372: void *args;
373: {
374: struct confargs *ca = args;
375: struct romaux *ra = &ca->ca_ra;
376: struct magma_softc *sc = (struct magma_softc *)dev;
377: const struct magma_board_info *card;
378: char magma_prom[40], *clockstr;
379: int chip, cd_clock, len;
380: void *base;
381:
382: len = getprop(ra->ra_node, "magma_prom",
383: magma_prom, sizeof(magma_prom) - 1);
384: if (len == -1)
385: len = 0;
386: magma_prom[len] = '\0';
387:
388: for (card = supported_cards; card->mb_name != NULL; card++) {
389: if (strcmp(ra->ra_name, card->mb_sbusname) != 0)
390: continue;
391: if (strcmp(magma_prom, card->mb_name) == 0)
392: break;
393: }
394:
395: if (card->mb_name == NULL) {
396: printf(" %s (unsupported)\n", magma_prom);
397: return;
398: }
399:
400:
401: clockstr = getpropstring(ra->ra_node, "clock");
402: if (strlen(clockstr) == 0)
403: cd_clock = 0;
404: else {
405: cd_clock = 0;
406: while (*clockstr != '\0')
407: cd_clock = cd_clock * 10 + *clockstr++ - '0';
408: }
409:
410: dprintf((" addr 0x%x", sc));
411: printf(" pri %d softpri %d:", ra->ra_intr[0].int_pri, IPL_TTY);
412: printf(" %s\n", card->mb_realname);
413:
414: sc->ms_board = card;
415: sc->ms_ncd1400 = card->mb_ncd1400;
416: sc->ms_ncd1190 = card->mb_ncd1190;
417:
418: base = mapiodev(&(ra->ra_reg[0]), 0, ra->ra_reg[0].rr_len);
419:
420: /* the SVCACK* lines are daisychained */
421: sc->ms_svcackr = base + card->mb_svcackr;
422: sc->ms_svcackt = base + card->mb_svcackt;
423: sc->ms_svcackm = base + card->mb_svcackm;
424:
425: /* Init the cd1400 chips */
426: for (chip = 0 ; chip < card->mb_ncd1400 ; chip++) {
427: struct cd1400 *cd = &sc->ms_cd1400[chip];
428:
429: cd->cd_reg = base + card->mb_cd1400[chip];
430:
431: cd->cd_clock = cd_clock;
432:
433: /* getpropstring(ra->ra_node, "chiprev"); */
434: /* seemingly the Magma drivers just ignore the propstring */
435: cd->cd_chiprev = cd1400_read_reg(cd, CD1400_GFRCR);
436:
437: dprintf(("%s attach CD1400 %d addr 0x%x rev %x clock %dMHz\n",
438: sc->ms_dev.dv_xname, chip,
439: cd->cd_reg, cd->cd_chiprev, cd->cd_clock));
440:
441: /* clear GFRCR */
442: cd1400_write_reg(cd, CD1400_GFRCR, 0x00);
443:
444: /* reset whole chip */
445: cd1400_write_ccr(cd, CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET);
446:
447: /* wait for revision code to be restored */
448: while (cd1400_read_reg(cd, CD1400_GFRCR) != cd->cd_chiprev)
449: ;
450:
451: /* set the Prescaler Period Register to tick at 1ms */
452: cd1400_write_reg(cd, CD1400_PPR,
453: ((cd->cd_clock * 1000000 / CD1400_PPR_PRESCALER + 500) /
454: 1000));
455:
456: /*
457: * The LC2+1Sp card is the only card that doesn't have a CD1190
458: * for the parallel port, but uses channel 0 of the CD1400, so
459: * we make a note of it for later and set up the CD1400 for
460: * parallel mode operation.
461: */
462: if (card->mb_npar && card->mb_ncd1190 == 0) {
463: cd1400_write_reg(cd, CD1400_GCR, CD1400_GCR_PARALLEL);
464: cd->cd_parmode = 1;
465: }
466: }
467:
468: /* init the cd1190 chips */
469: for (chip = 0 ; chip < card->mb_ncd1190 ; chip++) {
470: struct cd1190 *cd = &sc->ms_cd1190[chip];
471:
472: cd->cd_reg = base + card->mb_cd1190[chip];
473: dprintf(("%s attach CD1190 %d addr 0x%x (failed)\n",
474: sc->ms_dev.dv_xname, chip, cd->cd_reg));
475: /* XXX don't know anything about these chips yet */
476: }
477:
478: /* configure the children */
479: (void)config_found(dev, mtty_match, NULL);
480: (void)config_found(dev, mbpp_match, NULL);
481:
482: /*
483: * enable the interrupt handlers
484: */
485: sc->ms_hardint.ih_fun = magma_hard;
486: sc->ms_hardint.ih_arg = sc;
487: intr_establish(ra->ra_intr[0].int_pri, &sc->ms_hardint, -1,
488: dev->dv_xname);
489:
490: sc->ms_softint.ih_fun = magma_soft;
491: sc->ms_softint.ih_arg = sc;
492: intr_establish(IPL_TTY, &sc->ms_softint, IPL_TTY, dev->dv_xname);
493: }
494:
495: /*
496: * hard interrupt routine
497: *
498: * returns 1 if it handled it, otherwise 0
499: *
500: * runs at interrupt priority
501: */
502: int
503: magma_hard(arg)
504: void *arg;
505: {
506: struct magma_softc *sc = arg;
507: struct cd1400 *cd;
508: int chip, status = 0;
509: int serviced = 0;
510: int needsoftint = 0;
511:
512: /*
513: * check status of all the CD1400 chips
514: */
515: for (chip = 0 ; chip < sc->ms_ncd1400 ; chip++)
516: status |= cd1400_read_reg(&sc->ms_cd1400[chip], CD1400_SVRR);
517:
518: if (ISSET(status, CD1400_SVRR_RXRDY)) {
519: /* enter rx service context */
520: u_char rivr = *sc->ms_svcackr;
521: int port = rivr >> 4;
522:
523: if (rivr & (1 << 3)) { /* parallel port */
524: struct mbpp_port *mbpp;
525: int n_chars;
526:
527: mbpp = &sc->ms_mbpp->ms_port[port];
528: cd = mbpp->mp_cd1400;
529:
530: /* don't think we have to handle exceptions */
531: n_chars = cd1400_read_reg(cd, CD1400_RDCR);
532: while (n_chars--) {
533: if (mbpp->mp_cnt == 0) {
534: SET(mbpp->mp_flags, MBPPF_WAKEUP);
535: needsoftint = 1;
536: break;
537: }
538: *mbpp->mp_ptr = cd1400_read_reg(cd, CD1400_RDSR);
539: mbpp->mp_ptr++;
540: mbpp->mp_cnt--;
541: }
542: } else { /* serial port */
543: register struct mtty_port *mtty;
544: register u_char *ptr, n_chars, line_stat;
545:
546: mtty = &sc->ms_mtty->ms_port[port];
547: cd = mtty->mp_cd1400;
548:
549: if (ISSET(rivr, CD1400_RIVR_EXCEPTION)) {
550: line_stat = cd1400_read_reg(cd, CD1400_RDSR);
551: n_chars = 1;
552: } else { /* no exception, received data OK */
553: line_stat = 0;
554: n_chars = cd1400_read_reg(cd, CD1400_RDCR);
555: }
556:
557: ptr = mtty->mp_rput;
558: while (n_chars--) {
559: *ptr++ = line_stat;
560: *ptr++ = cd1400_read_reg(cd, CD1400_RDSR);
561: if (ptr == mtty->mp_rend)
562: ptr = mtty->mp_rbuf;
563: if (ptr == mtty->mp_rget) {
564: if (ptr == mtty->mp_rbuf)
565: ptr = mtty->mp_rend;
566: ptr -= 2;
567: SET(mtty->mp_flags, MTTYF_RING_OVERFLOW);
568: break;
569: }
570: }
571: mtty->mp_rput = ptr;
572:
573: needsoftint = 1;
574: }
575:
576: /* end service context */
577: cd1400_write_reg(cd, CD1400_EOSRR, 0);
578: serviced = 1;
579: } /* if (rx_service...) */
580:
581: if (ISSET(status, CD1400_SVRR_MDMCH)) {
582: /* enter mdm service context */
583: u_char mivr = *sc->ms_svcackm;
584: int port = mivr >> 4;
585: struct mtty_port *mtty;
586: int carrier;
587: u_char msvr;
588:
589: /*
590: * Handle CD (LC2+1Sp = DSR) changes.
591: */
592: mtty = &sc->ms_mtty->ms_port[port];
593: cd = mtty->mp_cd1400;
594: msvr = cd1400_read_reg(cd, CD1400_MSVR2);
595: carrier = ISSET(msvr,
596: cd->cd_parmode ? CD1400_MSVR2_DSR : CD1400_MSVR2_CD);
597:
598: if (mtty->mp_carrier != carrier) {
599: SET(mtty->mp_flags, MTTYF_CARRIER_CHANGED);
600: mtty->mp_carrier = carrier;
601: needsoftint = 1;
602: }
603:
604: /* end service context */
605: cd1400_write_reg(cd, CD1400_EOSRR, 0);
606: serviced = 1;
607: } /* if (mdm_service...) */
608:
609: if (ISSET(status, CD1400_SVRR_TXRDY)) {
610: /* enter tx service context */
611: u_char tivr = *sc->ms_svcackt;
612: int port = tivr >> 4;
613:
614: if (tivr & (1 << 3)) { /* parallel port */
615: struct mbpp_port *mbpp;
616:
617: mbpp = &sc->ms_mbpp->ms_port[port];
618: cd = mbpp->mp_cd1400;
619:
620: if (mbpp->mp_cnt) {
621: int count = 0;
622:
623: /* fill the fifo */
624: while (mbpp->mp_cnt &&
625: count++ < CD1400_PAR_FIFO_SIZE) {
626: cd1400_write_reg(cd, CD1400_TDR,
627: *mbpp->mp_ptr);
628: mbpp->mp_ptr++;
629: mbpp->mp_cnt--;
630: }
631: } else {
632: /*
633: * fifo is empty and we got no more data to
634: * send, so shut off interrupts and signal for
635: * a wakeup, which can't be done here in case
636: * we beat mbpp_send to the tsleep call
637: * (we are running at psl > spltty).
638: */
639: cd1400_write_reg(cd, CD1400_SRER, 0);
640: SET(mbpp->mp_flags, MBPPF_WAKEUP);
641: needsoftint = 1;
642: }
643: } else { /* serial port */
644: struct mtty_port *mtty;
645: struct tty *tp;
646:
647: mtty = &sc->ms_mtty->ms_port[port];
648: cd = mtty->mp_cd1400;
649: tp = mtty->mp_tty;
650:
651: if (!ISSET(mtty->mp_flags, MTTYF_STOP)) {
652: register int count = 0;
653:
654: /* check if we should start/stop a break */
655: if (ISSET(mtty->mp_flags, MTTYF_SET_BREAK)) {
656: cd1400_write_reg(cd, CD1400_TDR, 0);
657: cd1400_write_reg(cd, CD1400_TDR, 0x81);
658: /* should we delay too? */
659: CLR(mtty->mp_flags, MTTYF_SET_BREAK);
660: count += 2;
661: }
662:
663: if (ISSET(mtty->mp_flags, MTTYF_CLR_BREAK)) {
664: cd1400_write_reg(cd, CD1400_TDR, 0);
665: cd1400_write_reg(cd, CD1400_TDR, 0x83);
666: CLR(mtty->mp_flags, MTTYF_CLR_BREAK);
667: count += 2;
668: }
669:
670: /*
671: * I don't quite fill the fifo in case the last
672: * one is a NULL which I have to double up
673: * because its the escape code for embedded
674: * transmit characters.
675: */
676: while (mtty->mp_txc > 0 &&
677: count < CD1400_TX_FIFO_SIZE - 1) {
678: register u_char ch;
679:
680: ch = *mtty->mp_txp;
681:
682: mtty->mp_txc--;
683: mtty->mp_txp++;
684:
685: if (ch == 0) {
686: cd1400_write_reg(cd,
687: CD1400_TDR, ch);
688: count++;
689: }
690:
691: cd1400_write_reg(cd, CD1400_TDR, ch);
692: count++;
693: }
694: }
695:
696: /*
697: * If we ran out of work or are requested to STOP then
698: * shut off the txrdy interrupts and signal DONE to
699: * flush out the chars we have sent.
700: */
701: if (mtty->mp_txc == 0 ||
702: ISSET(mtty->mp_flags, MTTYF_STOP)) {
703: register int srer;
704:
705: srer = cd1400_read_reg(cd, CD1400_SRER);
706: CLR(srer, CD1400_SRER_TXRDY);
707: cd1400_write_reg(cd, CD1400_SRER, srer);
708: CLR(mtty->mp_flags, MTTYF_STOP);
709:
710: SET(mtty->mp_flags, MTTYF_DONE);
711: needsoftint = 1;
712: }
713: }
714:
715: /* end service context */
716: cd1400_write_reg(cd, CD1400_EOSRR, 0);
717: serviced = 1;
718: } /* if (tx_service...) */
719:
720: /* XXX service CD1190 interrupts too
721: for (chip = 0 ; chip < sc->ms_ncd1190 ; chip++) {
722: }
723: */
724:
725: if (needsoftint) { /* trigger the soft interrupt */
726: #if defined(SUN4M)
727: if (CPU_ISSUN4M)
728: raise(0, IPL_TTY);
729: else
730: #endif
731: ienab_bis(IE_MSOFT);
732: }
733:
734: return (serviced);
735: }
736:
737: /*
738: * magma soft interrupt handler
739: *
740: * returns 1 if it handled it, 0 otherwise
741: *
742: * runs at spltty()
743: */
744: int
745: magma_soft(arg)
746: void *arg;
747: {
748: struct magma_softc *sc = arg;
749: struct mtty_softc *mtty = sc->ms_mtty;
750: struct mbpp_softc *mbpp = sc->ms_mbpp;
751: int port;
752: int serviced = 0;
753: int s, flags;
754:
755: /*
756: * check the tty ports (if any) to see what needs doing
757: */
758: if (mtty) {
759: for (port = 0 ; port < mtty->ms_nports ; port++) {
760: struct mtty_port *mp = &mtty->ms_port[port];
761: struct tty *tp = mp->mp_tty;
762:
763: if (!ISSET(tp->t_state, TS_ISOPEN))
764: continue;
765:
766: /*
767: * handle any received data
768: */
769: while (mp->mp_rget != mp->mp_rput) {
770: u_char stat;
771: int data;
772:
773: stat = mp->mp_rget[0];
774: data = mp->mp_rget[1];
775: mp->mp_rget =
776: ((mp->mp_rget + 2) == mp->mp_rend) ?
777: mp->mp_rbuf : (mp->mp_rget + 2);
778:
779: if (stat & (CD1400_RDSR_BREAK | CD1400_RDSR_FE))
780: data |= TTY_FE;
781: if (stat & CD1400_RDSR_PE)
782: data |= TTY_PE;
783:
784: if (stat & CD1400_RDSR_OE)
785: log(LOG_WARNING,
786: "%s%x: fifo overflow\n",
787: mtty->ms_dev.dv_xname, port);
788:
789: (*linesw[tp->t_line].l_rint)(data, tp);
790: serviced = 1;
791: }
792:
793: s = splhigh(); /* block out hard interrupt routine */
794: flags = mp->mp_flags;
795: CLR(mp->mp_flags, MTTYF_DONE | MTTYF_CARRIER_CHANGED |
796: MTTYF_RING_OVERFLOW);
797: splx(s); /* ok */
798:
799: if (ISSET(flags, MTTYF_CARRIER_CHANGED)) {
800: dprintf(("%s%x: cd %s\n",
801: mtty->ms_dev.dv_xname, port,
802: mp->mp_carrier ? "on" : "off"));
803: (*linesw[tp->t_line].l_modem)(tp,
804: mp->mp_carrier);
805: serviced = 1;
806: }
807:
808: if (ISSET(flags, MTTYF_RING_OVERFLOW)) {
809: log(LOG_WARNING,
810: "%s%x: ring buffer overflow\n",
811: mtty->ms_dev.dv_xname, port);
812: serviced = 1;
813: }
814:
815: if (ISSET(flags, MTTYF_DONE)) {
816: ndflush(&tp->t_outq,
817: mp->mp_txp - tp->t_outq.c_cf);
818: CLR(tp->t_state, TS_BUSY);
819: /* might be some more */
820: (*linesw[tp->t_line].l_start)(tp);
821: serviced = 1;
822: }
823: } /* for (each mtty...) */
824: }
825:
826: /*
827: * check the bpp ports (if any) to see what needs doing
828: */
829: if (mbpp) {
830: for (port = 0 ; port < mbpp->ms_nports ; port++) {
831: struct mbpp_port *mp = &mbpp->ms_port[port];
832:
833: if (!ISSET(mp->mp_flags, MBPPF_OPEN))
834: continue;
835:
836: s = splhigh(); /* block out hard intr routine */
837: flags = mp->mp_flags;
838: CLR(mp->mp_flags, MBPPF_WAKEUP);
839: splx(s);
840:
841: if (ISSET(flags, MBPPF_WAKEUP)) {
842: wakeup(mp);
843: serviced = 1;
844: }
845: } /* for (each mbpp...) */
846: }
847:
848: return (serviced);
849: }
850:
851: /************************************************************************
852: *
853: * MTTY Routines
854: *
855: * mtty_match match one mtty device
856: * mtty_attach attach mtty devices
857: * mttyopen open mtty device
858: * mttyclose close mtty device
859: * mttyread read from mtty
860: * mttywrite write to mtty
861: * mttyioctl do ioctl on mtty
862: * mttytty return tty pointer for mtty
863: * mttystop stop mtty device
864: * mtty_start start mtty device
865: * mtty_param set mtty parameters
866: * mtty_modem_control set modem control lines
867: */
868:
869: int
870: mtty_match(parent, vcf, args)
871: struct device *parent;
872: void *vcf, *args;
873: {
874: struct magma_softc *sc = (struct magma_softc *)parent;
875:
876: return (args == mtty_match && sc->ms_board->mb_nser &&
877: sc->ms_mtty == NULL);
878: }
879:
880: void
881: mtty_attach(parent, dev, args)
882: struct device *parent;
883: struct device *dev;
884: void *args;
885: {
886: struct magma_softc *sc = (struct magma_softc *)parent;
887: struct mtty_softc *ms = (struct mtty_softc *)dev;
888: int port, chip, chan;
889:
890: sc->ms_mtty = ms;
891: dprintf((" addr 0x%x", ms));
892:
893: for (port = chip = chan = 0 ; port < sc->ms_board->mb_nser ; port++) {
894: struct mtty_port *mp = &ms->ms_port[port];
895: struct tty *tp;
896:
897: mp->mp_cd1400 = &sc->ms_cd1400[chip];
898: if (mp->mp_cd1400->cd_parmode && chan == 0)
899: chan = 1; /* skip channel 0 if parmode */
900: mp->mp_channel = chan;
901:
902: tp = ttymalloc();
903: tp->t_oproc = mtty_start;
904: tp->t_param = mtty_param;
905:
906: mp->mp_tty = tp;
907:
908: mp->mp_rbuf = malloc(MTTY_RBUF_SIZE, M_DEVBUF, M_NOWAIT);
909: if (mp->mp_rbuf == NULL)
910: break;
911:
912: mp->mp_rend = mp->mp_rbuf + MTTY_RBUF_SIZE;
913:
914: chan = (chan + 1) % CD1400_NO_OF_CHANNELS;
915: if (chan == 0)
916: chip++;
917: }
918:
919: ms->ms_nports = port;
920: printf(": %d tty%s\n", port, port == 1 ? "" : "s");
921: }
922:
923: /*
924: * open routine. returns zero if successful, else error code
925: */
926: int
927: mttyopen(dev, flags, mode, p)
928: dev_t dev;
929: int flags;
930: int mode;
931: struct proc *p;
932: {
933: int card = MAGMA_CARD(dev);
934: int port = MAGMA_PORT(dev);
935: struct mtty_softc *ms;
936: struct mtty_port *mp;
937: struct tty *tp;
938: struct cd1400 *cd;
939: int s;
940:
941: if (card >= mtty_cd.cd_ndevs || (ms = mtty_cd.cd_devs[card]) == NULL ||
942: port >= ms->ms_nports)
943: return (ENXIO); /* device not configured */
944:
945: mp = &ms->ms_port[port];
946: tp = mp->mp_tty;
947: tp->t_dev = dev;
948:
949: if (!ISSET(tp->t_state, TS_ISOPEN)) {
950: SET(tp->t_state, TS_WOPEN);
951:
952: /* set defaults */
953: ttychars(tp);
954: tp->t_iflag = TTYDEF_IFLAG;
955: tp->t_oflag = TTYDEF_OFLAG;
956: tp->t_cflag = TTYDEF_CFLAG;
957: if (ISSET(mp->mp_openflags, TIOCFLAG_CLOCAL))
958: SET(tp->t_cflag, CLOCAL);
959: if (ISSET(mp->mp_openflags, TIOCFLAG_CRTSCTS))
960: SET(tp->t_cflag, CRTSCTS);
961: if (ISSET(mp->mp_openflags, TIOCFLAG_MDMBUF))
962: SET(tp->t_cflag, MDMBUF);
963: tp->t_lflag = TTYDEF_LFLAG;
964: tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
965:
966: /* init ring buffer */
967: mp->mp_rput = mp->mp_rget = mp->mp_rbuf;
968:
969: s = spltty();
970:
971: /* reset CD1400 channel */
972: cd = mp->mp_cd1400;
973: cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel);
974: cd1400_write_ccr(cd, CD1400_CCR_CMDRESET);
975:
976: /* encode the port number in top half of LIVR */
977: cd1400_write_reg(cd, CD1400_LIVR, port << 4);
978:
979: /* sets parameters and raises DTR */
980: (void)mtty_param(tp, &tp->t_termios);
981:
982: /* set tty watermarks */
983: ttsetwater(tp);
984:
985: /* enable service requests */
986: cd1400_write_reg(cd, CD1400_SRER,
987: CD1400_SRER_RXDATA | CD1400_SRER_MDMCH);
988:
989: /* tell the tty about the carrier status */
990: if (ISSET(mp->mp_openflags, TIOCFLAG_SOFTCAR) || mp->mp_carrier)
991: SET(tp->t_state, TS_CARR_ON);
992: else
993: CLR(tp->t_state, TS_CARR_ON);
994: } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) {
995: return (EBUSY); /* superuser can break exclusive access */
996: } else {
997: s = spltty();
998: }
999:
1000: /* wait for carrier if necessary */
1001: if (!ISSET(flags, O_NONBLOCK)) {
1002: while (!ISSET(tp->t_cflag, CLOCAL) &&
1003: !ISSET(tp->t_state, TS_CARR_ON)) {
1004: int error;
1005:
1006: SET(tp->t_state, TS_WOPEN);
1007: error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH,
1008: "mttydcd", 0);
1009: if (error != 0) {
1010: splx(s);
1011: CLR(tp->t_state, TS_WOPEN);
1012: return (error);
1013: }
1014: }
1015: }
1016:
1017: splx(s);
1018:
1019: return ((*linesw[tp->t_line].l_open)(dev, tp));
1020: }
1021:
1022: /*
1023: * close routine. returns zero if successful, else error code
1024: */
1025: int
1026: mttyclose(dev, flag, mode, p)
1027: dev_t dev;
1028: int flag;
1029: int mode;
1030: struct proc *p;
1031: {
1032: struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
1033: struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
1034: struct tty *tp = mp->mp_tty;
1035: int s;
1036:
1037: (*linesw[tp->t_line].l_close)(tp, flag);
1038: s = spltty();
1039:
1040: /*
1041: * If HUPCL is set, and the tty is no longer open,
1042: * shut down the port.
1043: */
1044: if (ISSET(tp->t_cflag, HUPCL) || !ISSET(tp->t_state, TS_ISOPEN)) {
1045: /* XXX wait until FIFO is empty before turning off the channel
1046: struct cd1400 *cd = mp->mp_cd1400;
1047: */
1048:
1049: /* drop DTR and RTS */
1050: (void)mtty_modem_control(mp, 0, DMSET);
1051:
1052: /* turn off the channel
1053: cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel);
1054: cd1400_write_ccr(cd, CD1400_CCR_CMDRESET);
1055: */
1056: }
1057:
1058: splx(s);
1059: ttyclose(tp);
1060:
1061: return (0);
1062: }
1063:
1064: /*
1065: * Read routine
1066: */
1067: int
1068: mttyread(dev, uio, flags)
1069: dev_t dev;
1070: struct uio *uio;
1071: int flags;
1072: {
1073: struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
1074: struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
1075: struct tty *tp = mp->mp_tty;
1076:
1077: return ((*linesw[tp->t_line].l_read)(tp, uio, flags));
1078: }
1079:
1080: /*
1081: * Write routine
1082: */
1083: int
1084: mttywrite(dev, uio, flags)
1085: dev_t dev;
1086: struct uio *uio;
1087: int flags;
1088: {
1089: struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
1090: struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
1091: struct tty *tp = mp->mp_tty;
1092:
1093: return ((*linesw[tp->t_line].l_write)(tp, uio, flags));
1094: }
1095:
1096: /*
1097: * return tty pointer
1098: */
1099: struct tty *
1100: mttytty(dev)
1101: dev_t dev;
1102: {
1103: struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
1104: struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
1105:
1106: return (mp->mp_tty);
1107: }
1108:
1109: /*
1110: * ioctl routine
1111: */
1112: int
1113: mttyioctl(dev, cmd, data, flags, p)
1114: dev_t dev;
1115: u_long cmd;
1116: caddr_t data;
1117: int flags;
1118: struct proc *p;
1119: {
1120: struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(dev)];
1121: struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
1122: struct tty *tp = mp->mp_tty;
1123: int error;
1124:
1125: error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flags, p);
1126: if (error >= 0)
1127: return (error);
1128:
1129: error = ttioctl(tp, cmd, data, flags, p);
1130: if (error >= 0)
1131: return (error);
1132:
1133: error = 0;
1134:
1135: switch(cmd) {
1136: case TIOCSBRK: /* set break */
1137: SET(mp->mp_flags, MTTYF_SET_BREAK);
1138: cd1400_enable_transmitter(mp->mp_cd1400, mp->mp_channel);
1139: break;
1140:
1141: case TIOCCBRK: /* clear break */
1142: SET(mp->mp_flags, MTTYF_CLR_BREAK);
1143: cd1400_enable_transmitter(mp->mp_cd1400, mp->mp_channel);
1144: break;
1145:
1146: case TIOCSDTR: /* set DTR */
1147: mtty_modem_control(mp, TIOCM_DTR, DMBIS);
1148: break;
1149:
1150: case TIOCCDTR: /* clear DTR */
1151: mtty_modem_control(mp, TIOCM_DTR, DMBIC);
1152: break;
1153:
1154: case TIOCMSET: /* set modem lines */
1155: mtty_modem_control(mp, *((int *)data), DMSET);
1156: break;
1157:
1158: case TIOCMBIS: /* bit set modem lines */
1159: mtty_modem_control(mp, *((int *)data), DMBIS);
1160: break;
1161:
1162: case TIOCMBIC: /* bit clear modem lines */
1163: mtty_modem_control(mp, *((int *)data), DMBIC);
1164: break;
1165:
1166: case TIOCMGET: /* get modem lines */
1167: *((int *)data) = mtty_modem_control(mp, 0, DMGET);
1168: break;
1169:
1170: case TIOCGFLAGS:
1171: *((int *)data) = mp->mp_openflags;
1172: break;
1173:
1174: case TIOCSFLAGS:
1175: if (suser(p, 0))
1176: error = EPERM;
1177: else
1178: mp->mp_openflags = *((int *)data) &
1179: (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL |
1180: TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF);
1181: break;
1182:
1183: default:
1184: error = ENOTTY;
1185: }
1186:
1187: return (error);
1188: }
1189:
1190: /*
1191: * Stop output, e.g., for ^S or output flush.
1192: */
1193: int
1194: mttystop(tp, flags)
1195: struct tty *tp;
1196: int flags;
1197: {
1198: struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(tp->t_dev)];
1199: struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(tp->t_dev)];
1200: int s;
1201:
1202: s = spltty();
1203:
1204: if (ISSET(tp->t_state, TS_BUSY)) {
1205: if (!ISSET(tp->t_state, TS_TTSTOP))
1206: SET(tp->t_state, TS_FLUSH);
1207:
1208: /*
1209: * the transmit interrupt routine will disable transmit when it
1210: * notices that MTTYF_STOP has been set.
1211: */
1212: SET(mp->mp_flags, MTTYF_STOP);
1213: }
1214:
1215: splx(s);
1216: return (0);
1217: }
1218:
1219: /*
1220: * Start output, after a stop.
1221: */
1222: void
1223: mtty_start(tp)
1224: struct tty *tp;
1225: {
1226: struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(tp->t_dev)];
1227: struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(tp->t_dev)];
1228: int s;
1229:
1230: s = spltty();
1231:
1232: /*
1233: * We only need to do something if we are not already busy
1234: * or delaying or stopped.
1235: */
1236: if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) {
1237:
1238: /*
1239: * If we are sleeping and output has drained below
1240: * low water mark, awaken.
1241: */
1242: if (tp->t_outq.c_cc <= tp->t_lowat) {
1243: if (ISSET(tp->t_state, TS_ASLEEP)) {
1244: CLR(tp->t_state, TS_ASLEEP);
1245: wakeup(&tp->t_outq);
1246: }
1247:
1248: selwakeup(&tp->t_wsel);
1249: }
1250:
1251: /*
1252: * If there is something to send, start transmitting.
1253: */
1254: if (tp->t_outq.c_cc) {
1255: mp->mp_txc = ndqb(&tp->t_outq, 0);
1256: mp->mp_txp = tp->t_outq.c_cf;
1257: SET(tp->t_state, TS_BUSY);
1258: cd1400_enable_transmitter(mp->mp_cd1400,
1259: mp->mp_channel);
1260: }
1261: }
1262:
1263: splx(s);
1264: }
1265:
1266: /*
1267: * set/get modem line status
1268: *
1269: * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR
1270: *
1271: * note that DTR and RTS lines are exchanged, and that DSR is
1272: * not available on the LC2+1Sp card (used as CD)
1273: *
1274: * only let them fiddle with RTS if CRTSCTS is not enabled
1275: */
1276: int
1277: mtty_modem_control(mp, bits, howto)
1278: struct mtty_port *mp;
1279: int bits;
1280: int howto;
1281: {
1282: struct cd1400 *cd = mp->mp_cd1400;
1283: struct tty *tp = mp->mp_tty;
1284: int s, msvr;
1285:
1286: s = spltty();
1287:
1288: cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel);
1289:
1290: switch(howto) {
1291: case DMGET: /* get bits */
1292: bits = 0;
1293:
1294: bits |= TIOCM_LE;
1295:
1296: msvr = cd1400_read_reg(cd, CD1400_MSVR1);
1297: if (msvr & CD1400_MSVR1_RTS)
1298: bits |= TIOCM_DTR;
1299:
1300: msvr = cd1400_read_reg(cd, CD1400_MSVR2);
1301: if (msvr & CD1400_MSVR2_DTR)
1302: bits |= TIOCM_RTS;
1303: if (msvr & CD1400_MSVR2_CTS)
1304: bits |= TIOCM_CTS;
1305: if (msvr & CD1400_MSVR2_RI)
1306: bits |= TIOCM_RI;
1307: if (msvr & CD1400_MSVR2_DSR)
1308: bits |= (cd->cd_parmode ? TIOCM_CD : TIOCM_DSR);
1309: if (msvr & CD1400_MSVR2_CD)
1310: bits |= (cd->cd_parmode ? 0 : TIOCM_CD);
1311:
1312: break;
1313:
1314: case DMSET: /* reset bits */
1315: if (!ISSET(tp->t_cflag, CRTSCTS))
1316: cd1400_write_reg(cd, CD1400_MSVR2,
1317: ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0));
1318:
1319: cd1400_write_reg(cd, CD1400_MSVR1,
1320: ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0));
1321:
1322: break;
1323:
1324: case DMBIS: /* set bits */
1325: if ((bits & TIOCM_RTS) && !ISSET(tp->t_cflag, CRTSCTS))
1326: cd1400_write_reg(cd, CD1400_MSVR2, CD1400_MSVR2_DTR);
1327:
1328: if (bits & TIOCM_DTR)
1329: cd1400_write_reg(cd, CD1400_MSVR1, CD1400_MSVR1_RTS);
1330:
1331: break;
1332:
1333: case DMBIC: /* clear bits */
1334: if ((bits & TIOCM_RTS) && !ISSET(tp->t_cflag, CRTSCTS))
1335: cd1400_write_reg(cd, CD1400_MSVR2, 0);
1336:
1337: if (bits & TIOCM_DTR)
1338: cd1400_write_reg(cd, CD1400_MSVR1, 0);
1339:
1340: break;
1341: }
1342:
1343: splx(s);
1344: return (bits);
1345: }
1346:
1347: /*
1348: * Set tty parameters, returns error or 0 on success
1349: */
1350: int
1351: mtty_param(tp, t)
1352: struct tty *tp;
1353: struct termios *t;
1354: {
1355: struct mtty_softc *ms = mtty_cd.cd_devs[MAGMA_CARD(tp->t_dev)];
1356: struct mtty_port *mp = &ms->ms_port[MAGMA_PORT(tp->t_dev)];
1357: struct cd1400 *cd = mp->mp_cd1400;
1358: int rbpr, tbpr, rcor, tcor;
1359: u_char mcor1 = 0, mcor2 = 0;
1360: int s, opt;
1361:
1362: if (t->c_ospeed &&
1363: cd1400_compute_baud(t->c_ospeed, cd->cd_clock, &tcor, &tbpr))
1364: return (EINVAL);
1365:
1366: if (t->c_ispeed &&
1367: cd1400_compute_baud(t->c_ispeed, cd->cd_clock, &rcor, &rbpr))
1368: return (EINVAL);
1369:
1370: s = spltty();
1371:
1372: /* hang up the line if ospeed is zero, else raise DTR */
1373: (void)mtty_modem_control(mp, TIOCM_DTR,
1374: (t->c_ospeed == 0 ? DMBIC : DMBIS));
1375:
1376: /* select channel, done in mtty_modem_control() */
1377: /* cd1400_write_reg(cd, CD1400_CAR, mp->mp_channel); */
1378:
1379: /* set transmit speed */
1380: if (t->c_ospeed) {
1381: cd1400_write_reg(cd, CD1400_TCOR, tcor);
1382: cd1400_write_reg(cd, CD1400_TBPR, tbpr);
1383: }
1384:
1385: /* set receive speed */
1386: if (t->c_ispeed) {
1387: cd1400_write_reg(cd, CD1400_RCOR, rcor);
1388: cd1400_write_reg(cd, CD1400_RBPR, rbpr);
1389: }
1390:
1391: /* enable transmitting and receiving on this channel */
1392: opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN | CD1400_CCR_RCVEN;
1393: cd1400_write_ccr(cd, opt);
1394:
1395: /* set parity, data and stop bits */
1396: opt = 0;
1397: if (ISSET(t->c_cflag, PARENB))
1398: opt |= (ISSET(t->c_cflag, PARODD) ?
1399: CD1400_COR1_PARODD : CD1400_COR1_PARNORMAL);
1400:
1401: if (!ISSET(t->c_iflag, INPCK))
1402: opt |= CD1400_COR1_NOINPCK; /* no parity checking */
1403:
1404: if (ISSET(t->c_cflag, CSTOPB))
1405: opt |= CD1400_COR1_STOP2;
1406:
1407: switch (t->c_cflag & CSIZE) {
1408: case CS5:
1409: opt |= CD1400_COR1_CS5;
1410: break;
1411:
1412: case CS6:
1413: opt |= CD1400_COR1_CS6;
1414: break;
1415:
1416: case CS7:
1417: opt |= CD1400_COR1_CS7;
1418: break;
1419:
1420: default:
1421: opt |= CD1400_COR1_CS8;
1422: break;
1423: }
1424:
1425: cd1400_write_reg(cd, CD1400_COR1, opt);
1426:
1427: /*
1428: * enable Embedded Transmit Commands (for breaks)
1429: * use the CD1400 automatic CTS flow control if CRTSCTS is set
1430: */
1431: opt = CD1400_COR2_ETC;
1432: if (ISSET(t->c_cflag, CRTSCTS))
1433: opt |= CD1400_COR2_CCTS_OFLOW;
1434: cd1400_write_reg(cd, CD1400_COR2, opt);
1435:
1436: cd1400_write_reg(cd, CD1400_COR3, MTTY_RX_FIFO_THRESHOLD);
1437:
1438: cd1400_write_ccr(cd, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR1 |
1439: CD1400_CCR_COR2 | CD1400_CCR_COR3);
1440:
1441: cd1400_write_reg(cd, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION);
1442: cd1400_write_reg(cd, CD1400_COR5, 0);
1443:
1444: /*
1445: * if automatic RTS handshaking enabled, set DTR threshold
1446: * (RTS and DTR lines are switched, CD1400 thinks its DTR)
1447: */
1448: if (ISSET(t->c_cflag, CRTSCTS))
1449: mcor1 = MTTY_RX_DTR_THRESHOLD;
1450:
1451: /* set up `carrier detect' interrupts */
1452: if (cd->cd_parmode) {
1453: SET(mcor1, CD1400_MCOR1_DSRzd);
1454: SET(mcor2, CD1400_MCOR2_DSRod);
1455: } else {
1456: SET(mcor1, CD1400_MCOR1_CDzd);
1457: SET(mcor2, CD1400_MCOR2_CDod);
1458: }
1459:
1460: cd1400_write_reg(cd, CD1400_MCOR1, mcor1);
1461: cd1400_write_reg(cd, CD1400_MCOR2, mcor2);
1462:
1463: /* receive timeout 2ms */
1464: cd1400_write_reg(cd, CD1400_RTPR, 2);
1465:
1466: splx(s);
1467: return (0);
1468: }
1469:
1470: /************************************************************************
1471: *
1472: * MBPP Routines
1473: *
1474: * mbpp_match match one mbpp device
1475: * mbpp_attach attach mbpp devices
1476: * mbppopen open mbpp device
1477: * mbppclose close mbpp device
1478: * mbppread read from mbpp
1479: * mbppwrite write to mbpp
1480: * mbppioctl do ioctl on mbpp
1481: * mbpppoll do poll on mbpp
1482: * mbpp_rw general rw routine
1483: * mbpp_timeout rw timeout
1484: * mbpp_start rw start after delay
1485: * mbpp_send send data
1486: * mbpp_recv recv data
1487: */
1488:
1489: int
1490: mbpp_match(parent, vcf, args)
1491: struct device *parent;
1492: void *vcf, *args;
1493: {
1494: register struct magma_softc *sc = (struct magma_softc *)parent;
1495:
1496: return (args == mbpp_match && sc->ms_board->mb_npar &&
1497: sc->ms_mbpp == NULL);
1498: }
1499:
1500: void
1501: mbpp_attach(parent, dev, args)
1502: struct device *parent;
1503: struct device *dev;
1504: void *args;
1505: {
1506: struct magma_softc *sc = (struct magma_softc *)parent;
1507: struct mbpp_softc *ms = (struct mbpp_softc *)dev;
1508: struct mbpp_port *mp;
1509: int port;
1510:
1511: sc->ms_mbpp = ms;
1512: dprintf((" addr 0x%x", ms));
1513:
1514: for (port = 0 ; port < sc->ms_board->mb_npar ; port++) {
1515: mp = &ms->ms_port[port];
1516:
1517: if (sc->ms_ncd1190)
1518: mp->mp_cd1190 = &sc->ms_cd1190[port];
1519: else
1520: mp->mp_cd1400 = &sc->ms_cd1400[0];
1521:
1522: timeout_set(&mp->mp_timeout_tmo, mbpp_timeout, mp);
1523: timeout_set(&mp->mp_start_tmo, mbpp_start, mp);
1524: }
1525:
1526: ms->ms_nports = port;
1527: printf(": %d port%s\n", port, port == 1 ? "" : "s");
1528: }
1529:
1530: /*
1531: * open routine. returns zero if successful, else error code
1532: */
1533: int
1534: mbppopen(dev, flags, mode, p)
1535: dev_t dev;
1536: int flags;
1537: int mode;
1538: struct proc *p;
1539: {
1540: int card = MAGMA_CARD(dev);
1541: int port = MAGMA_PORT(dev);
1542: struct mbpp_softc *ms;
1543: struct mbpp_port *mp;
1544: int s;
1545:
1546: if (card >= mbpp_cd.cd_ndevs || (ms = mbpp_cd.cd_devs[card]) == NULL ||
1547: port >= ms->ms_nports)
1548: return (ENXIO);
1549:
1550: mp = &ms->ms_port[port];
1551:
1552: s = spltty();
1553: if (ISSET(mp->mp_flags, MBPPF_OPEN)) {
1554: splx(s);
1555: return (EBUSY);
1556: }
1557: SET(mp->mp_flags, MBPPF_OPEN);
1558: splx(s);
1559:
1560: /* set defaults */
1561: mp->mp_burst = BPP_BURST;
1562: mp->mp_timeout = mbpp_mstohz(BPP_TIMEOUT);
1563: mp->mp_delay = mbpp_mstohz(BPP_DELAY);
1564:
1565: /* init chips */
1566: if (mp->mp_cd1400) { /* CD1400 */
1567: struct cd1400 *cd = mp->mp_cd1400;
1568:
1569: /* set up CD1400 channel */
1570: s = spltty();
1571: cd1400_write_reg(cd, CD1400_CAR, 0);
1572: cd1400_write_ccr(cd, CD1400_CCR_CMDRESET);
1573: cd1400_write_reg(cd, CD1400_LIVR, (1 << 3));
1574: splx(s);
1575: } else { /* CD1190 */
1576: mp->mp_flags = 0;
1577: return (ENXIO);
1578: }
1579:
1580: return (0);
1581: }
1582:
1583: /*
1584: * close routine. returns zero if successful, else error code
1585: */
1586: int
1587: mbppclose(dev, flag, mode, p)
1588: dev_t dev;
1589: int flag;
1590: int mode;
1591: struct proc *p;
1592: {
1593: struct mbpp_softc *ms = mbpp_cd.cd_devs[MAGMA_CARD(dev)];
1594: struct mbpp_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
1595:
1596: mp->mp_flags = 0;
1597: return (0);
1598: }
1599:
1600: /*
1601: * Read routine
1602: */
1603: int
1604: mbppread(dev, uio, flags)
1605: dev_t dev;
1606: struct uio *uio;
1607: int flags;
1608: {
1609: return (mbpp_rw(dev, uio));
1610: }
1611:
1612: /*
1613: * Write routine
1614: */
1615: int
1616: mbppwrite(dev, uio, flags)
1617: dev_t dev;
1618: struct uio *uio;
1619: int flags;
1620: {
1621: return (mbpp_rw(dev, uio));
1622: }
1623:
1624: /*
1625: * ioctl routine
1626: */
1627: int
1628: mbppioctl(dev, cmd, data, flags, p)
1629: dev_t dev;
1630: u_long cmd;
1631: caddr_t data;
1632: int flags;
1633: struct proc *p;
1634: {
1635: struct mbpp_softc *ms = mbpp_cd.cd_devs[MAGMA_CARD(dev)];
1636: register struct mbpp_port *mp = &ms->ms_port[MAGMA_PORT(dev)];
1637: struct bpp_param *bp;
1638: int error = 0;
1639: int s;
1640:
1641: switch(cmd) {
1642: case BPPIOCSPARAM:
1643: bp = (struct bpp_param *)data;
1644: if (bp->bp_burst < BPP_BURST_MIN ||
1645: bp->bp_burst > BPP_BURST_MAX ||
1646: bp->bp_delay < BPP_DELAY_MIN ||
1647: bp->bp_delay > BPP_DELAY_MIN) {
1648: error = EINVAL;
1649: } else {
1650: mp->mp_burst = bp->bp_burst;
1651: mp->mp_timeout = mbpp_mstohz(bp->bp_timeout);
1652: mp->mp_delay = mbpp_mstohz(bp->bp_delay);
1653: }
1654: break;
1655: case BPPIOCGPARAM:
1656: bp = (struct bpp_param *)data;
1657: bp->bp_burst = mp->mp_burst;
1658: bp->bp_timeout = mbpp_hztoms(mp->mp_timeout);
1659: bp->bp_delay = mbpp_hztoms(mp->mp_delay);
1660: break;
1661: case BPPIOCGSTAT:
1662: /* XXX make this more generic */
1663: s = spltty();
1664: cd1400_write_reg(mp->mp_cd1400, CD1400_CAR, 0);
1665: *(int *)data = cd1400_read_reg(mp->mp_cd1400, CD1400_PSVR);
1666: splx(s);
1667: break;
1668: default:
1669: error = ENOTTY;
1670: }
1671:
1672: return (error);
1673: }
1674:
1675: /*
1676: * poll routine
1677: */
1678: int
1679: mbpppoll(dev, events, p)
1680: dev_t dev;
1681: int events;
1682: struct proc *p;
1683: {
1684: return (seltrue(dev, events, p));
1685: }
1686:
1687: int
1688: mbpp_rw(dev, uio)
1689: dev_t dev;
1690: struct uio *uio;
1691: {
1692: int card = MAGMA_CARD(dev);
1693: int port = MAGMA_PORT(dev);
1694: struct mbpp_softc *ms = mbpp_cd.cd_devs[card];
1695: register struct mbpp_port *mp = &ms->ms_port[port];
1696: caddr_t buffer, ptr;
1697: int buflen, cnt, len;
1698: int s, error = 0;
1699: int gotdata = 0;
1700:
1701: if (uio->uio_resid == 0)
1702: return (0);
1703:
1704: buflen = min(uio->uio_resid, mp->mp_burst);
1705: buffer = malloc(buflen, M_DEVBUF, M_WAITOK);
1706:
1707: SET(mp->mp_flags, MBPPF_UIO);
1708:
1709: /*
1710: * start timeout, if needed
1711: */
1712: if (mp->mp_timeout > 0) {
1713: SET(mp->mp_flags, MBPPF_TIMEOUT);
1714: timeout_add(&mp->mp_timeout_tmo, mp->mp_timeout);
1715: }
1716:
1717: len = cnt = 0;
1718: while (uio->uio_resid > 0) {
1719: len = min(buflen, uio->uio_resid);
1720: ptr = buffer;
1721:
1722: if (uio->uio_rw == UIO_WRITE) {
1723: error = uiomove(ptr, len, uio);
1724: if (error)
1725: break;
1726: }
1727: again: /* goto bad */
1728: /* timed out? */
1729: if (!ISSET(mp->mp_flags, MBPPF_UIO))
1730: break;
1731:
1732: /*
1733: * perform the operation
1734: */
1735: if (uio->uio_rw == UIO_WRITE) {
1736: cnt = mbpp_send(mp, ptr, len);
1737: } else {
1738: cnt = mbpp_recv(mp, ptr, len);
1739: }
1740:
1741: if (uio->uio_rw == UIO_READ) {
1742: if (cnt) {
1743: error = uiomove(ptr, cnt, uio);
1744: if (error)
1745: break;
1746: gotdata++;
1747: }
1748: else if (gotdata) /* consider us done */
1749: break;
1750: }
1751:
1752: /* timed out? */
1753: if (!ISSET(mp->mp_flags, MBPPF_UIO))
1754: break;
1755:
1756: /*
1757: * poll delay?
1758: */
1759: if (mp->mp_delay > 0) {
1760: s = spltty(); /* XXX */
1761: SET(mp->mp_flags, MBPPF_DELAY);
1762: timeout_add(&mp->mp_start_tmo, mp->mp_delay);
1763: error = tsleep(mp, PCATCH | PZERO, "mbppdelay", 0);
1764: splx(s);
1765: if (error)
1766: break;
1767: }
1768:
1769: /*
1770: * Don't call uiomove again until we used all the data we
1771: * grabbed.
1772: */
1773: if (uio->uio_rw == UIO_WRITE && cnt != len) {
1774: ptr += cnt;
1775: len -= cnt;
1776: cnt = 0;
1777: goto again;
1778: }
1779: }
1780:
1781: /*
1782: * clear timeouts
1783: */
1784: s = spltty(); /* XXX */
1785: if (ISSET(mp->mp_flags, MBPPF_TIMEOUT)) {
1786: timeout_del(&mp->mp_timeout_tmo);
1787: CLR(mp->mp_flags, MBPPF_TIMEOUT);
1788: }
1789: if (ISSET(mp->mp_flags, MBPPF_DELAY)) {
1790: timeout_del(&mp->mp_start_tmo);
1791: CLR(mp->mp_flags, MBPPF_DELAY);
1792: }
1793: splx(s);
1794:
1795: /*
1796: * Adjust for those chars that we uiomoved but never actually wrote.
1797: */
1798: if (uio->uio_rw == UIO_WRITE && cnt != len) {
1799: uio->uio_resid += (len - cnt);
1800: }
1801:
1802: free(buffer, M_DEVBUF);
1803: return (error);
1804: }
1805:
1806: void
1807: mbpp_timeout(arg)
1808: void *arg;
1809: {
1810: struct mbpp_port *mp = arg;
1811:
1812: CLR(mp->mp_flags, MBPPF_UIO | MBPPF_TIMEOUT);
1813: wakeup(mp);
1814: }
1815:
1816: void
1817: mbpp_start(arg)
1818: void *arg;
1819: {
1820: struct mbpp_port *mp = arg;
1821:
1822: CLR(mp->mp_flags, MBPPF_DELAY);
1823: wakeup(mp);
1824: }
1825:
1826: int
1827: mbpp_send(mp, ptr, len)
1828: struct mbpp_port *mp;
1829: caddr_t ptr;
1830: int len;
1831: {
1832: int s;
1833: struct cd1400 *cd = mp->mp_cd1400;
1834:
1835: /* set up io information */
1836: mp->mp_ptr = ptr;
1837: mp->mp_cnt = len;
1838:
1839: /* start transmitting */
1840: s = spltty();
1841: if (cd) {
1842: cd1400_write_reg(cd, CD1400_CAR, 0);
1843:
1844: /* output strobe width ~1microsecond */
1845: cd1400_write_reg(cd, CD1400_TBPR, 10);
1846:
1847: /* enable channel */
1848: cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN);
1849: cd1400_write_reg(cd, CD1400_SRER, CD1400_SRER_TXRDY);
1850: }
1851:
1852: /* zzz... */
1853: tsleep(mp, PCATCH | PZERO, "mbpp_send", 0);
1854:
1855: /* stop transmitting */
1856: if (cd) {
1857: cd1400_write_reg(cd, CD1400_CAR, 0);
1858:
1859: /* disable transmitter */
1860: cd1400_write_reg(cd, CD1400_SRER, 0);
1861: cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTDIS);
1862:
1863: /* flush fifo */
1864: cd1400_write_ccr(cd, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
1865: }
1866: splx(s);
1867:
1868: /* return number of chars sent */
1869: return (len - mp->mp_cnt);
1870: }
1871:
1872: int
1873: mbpp_recv(mp, ptr, len)
1874: struct mbpp_port *mp;
1875: caddr_t ptr;
1876: int len;
1877: {
1878: int s;
1879: struct cd1400 *cd = mp->mp_cd1400;
1880:
1881: /* set up io information */
1882: mp->mp_ptr = ptr;
1883: mp->mp_cnt = len;
1884:
1885: /* start receiving */
1886: s = spltty();
1887: if (cd) {
1888: int rcor, rbpr;
1889:
1890: cd1400_write_reg(cd, CD1400_CAR, 0);
1891:
1892: /* input strobe at 100kbaud (10microseconds) */
1893: cd1400_compute_baud(100000, cd->cd_clock, &rcor, &rbpr);
1894: cd1400_write_reg(cd, CD1400_RCOR, rcor);
1895: cd1400_write_reg(cd, CD1400_RBPR, rbpr);
1896:
1897: /* rx threshold */
1898: cd1400_write_reg(cd, CD1400_COR3, MBPP_RX_FIFO_THRESHOLD);
1899: cd1400_write_ccr(cd, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR3);
1900:
1901: /* enable channel */
1902: cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_RCVEN);
1903: cd1400_write_reg(cd, CD1400_SRER, CD1400_SRER_RXDATA);
1904: }
1905:
1906: /* zzz... */
1907: tsleep(mp, PCATCH | PZERO, "mbpp_recv", 0);
1908:
1909: /* stop receiving */
1910: if (cd) {
1911: cd1400_write_reg(cd, CD1400_CAR, 0);
1912:
1913: /* disable receiving */
1914: cd1400_write_reg(cd, CD1400_SRER, 0);
1915: cd1400_write_ccr(cd, CD1400_CCR_CMDCHANCTL | CD1400_CCR_RCVDIS);
1916: }
1917: splx(s);
1918:
1919: /* return number of chars received */
1920: return (len - mp->mp_cnt);
1921: }
1922:
1923: int
1924: mbpp_hztoms(h)
1925: int h;
1926: {
1927: int m = h;
1928:
1929: if (m > 0)
1930: m = m * 1000 / hz;
1931: return (m);
1932: }
1933:
1934: int
1935: mbpp_mstohz(m)
1936: int m;
1937: {
1938: int h = m;
1939:
1940: if (h > 0) {
1941: h = h * hz / 1000;
1942: if (h == 0)
1943: h = 1000 / hz;
1944: }
1945: return (h);
1946: }