Annotation of sys/arch/sparc/dev/if_ie.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: if_ie.h,v 1.2 1997/08/08 08:25:11 downsj Exp $ */
2: /* $NetBSD: if_ie.h,v 1.4 1994/12/16 22:01:11 deraadt Exp $ */
3:
4: /*
5: * if_sunie.h
6: *
7: * sun's ie interface
8: */
9:
10: /*
11: * programming notes:
12: *
13: * the ie chip operates in a 24 bit address space.
14: *
15: * most ie interfaces appear to be divided into two parts:
16: * - generic 586 stuff
17: * - board specific
18: *
19: * generic:
20: * the generic stuff of the ie chip is all done with data structures
21: * that live in the chip's memory address space. the chip expects
22: * its main data structure (the sys conf ptr -- SCP) to be at a fixed
23: * address in its 24 bit space: 0xfffff4
24: *
25: * the SCP points to another structure called the ISCP.
26: * the ISCP points to another structure called the SCB.
27: * the SCB has a status field, a linked list of "commands", and
28: * a linked list of "receive buffers". these are data structures that
29: * live in memory, not registers.
30: *
31: * board:
32: * to get the chip to do anything, you first put a command in the
33: * command data structure list. then you have to signal "attention"
34: * to the chip to get it to look at the command. how you
35: * signal attention depends on what board you have... on PC's
36: * there is an i/o port number to do this, on sun's there is a
37: * register bit you toggle.
38: *
39: * to get data from the chip you program it to interrupt...
40: *
41: *
42: * sun issues:
43: *
44: * there are 3 kinds of sun "ie" interfaces:
45: * 1 - a VME/multibus card
46: * 2 - an on-board interface (sun3's, sun-4/100's, and sun-4/200's)
47: * 3 - another VME board called the 3E
48: *
49: * the VME boards lives in vme16 space. only 16 and 8 bit accesses
50: * are allowed, so functions that copy data must be aware of this.
51: *
52: * the chip is an intel chip. this means that the byte order
53: * on all the "short"s in the chip's data structures is wrong.
54: * so, constants described in the intel docs are swapped for the sun.
55: * that means that any buffer pointers you give the chip must be
56: * swapped to intel format. yuck.
57: *
58: * VME/multibus interface:
59: * for the multibus interface the board ignores the top 4 bits
60: * of the chip address. the multibus interface seems to have its
61: * own MMU like page map (without protections or valid bits, etc).
62: * there are 256 pages of physical memory on the board (each page
63: * is 1024 bytes). there are 1024 slots in the page map. so,
64: * a 1024 byte page takes up 10 bits of address for the offset,
65: * and if there are 1024 slots in the page that is another 10 bits
66: * of the address. that makes a 20 bit address, and as stated
67: * earlier the board ignores the top 4 bits, so that accounts
68: * for all 24 bits of address.
69: *
70: * note that the last entry of the page map maps the top of the
71: * 24 bit address space and that the SCP is supposed to be at
72: * 0xfffff4 (taking into account allignment). so,
73: * for multibus, that entry in the page map has to be used for the SCP.
74: *
75: * the page map effects BOTH how the ie chip sees the
76: * memory, and how the host sees it.
77: *
78: * the page map is part of the "register" area of the board
79: *
80: * on-board interface:
81: *
82: * <fill in useful info later>
83: *
84: *
85: * VME3E interface:
86: *
87: * <fill in useful info later>
88: *
89: */
90:
91: /*
92: * PART 1: VME/multibus defs
93: */
94: #define IEVME_PAGESIZE 1024 /* bytes */
95: #define IEVME_PAGSHIFT 10 /* bits */
96: #define IEVME_NPAGES 256 /* number of pages on chip */
97: #define IEVME_MAPSZ 1024 /* number of entries in the map */
98:
99: /*
100: * PTE for the page map
101: */
102: #define IEVME_SBORDR 0x8000 /* sun byte order */
103: #define IEVME_IBORDR 0x0000 /* intel byte ordr */
104:
105: #define IEVME_P2MEM 0x2000 /* memory is on P2 */
106: #define IEVME_OBMEM 0x0000 /* memory is on board */
107:
108: #define IEVME_PGMASK 0x0fff /* gives the physical page frame number */
109:
110: struct ievme {
111: u_short pgmap[IEVME_MAPSZ];
112: u_short xxx[32]; /* prom */
113: u_short status; /* see below for bits */
114: u_short xxx2; /* filler */
115: u_short pectrl; /* parity control (see below) */
116: u_short peaddr; /* low 16 bits of address */
117: };
118:
119: /*
120: * status bits
121: */
122: #define IEVME_RESET 0x8000 /* reset board */
123: #define IEVME_ONAIR 0x4000 /* go out of loopback 'on-air' */
124: #define IEVME_ATTEN 0x2000 /* attention */
125: #define IEVME_IENAB 0x1000 /* interrupt enable */
126: #define IEVME_PEINT 0x0800 /* parity error interrupt enable */
127: #define IEVME_PERR 0x0200 /* parity error flag */
128: #define IEVME_INT 0x0100 /* interrupt flag */
129: #define IEVME_P2EN 0x0020 /* enable p2 bus */
130: #define IEVME_256K 0x0010 /* 256kb rams */
131: #define IEVME_HADDR 0x000f /* mask for bits 17-20 of address */
132:
133: /*
134: * parity control
135: */
136: #define IEVME_PARACK 0x0100 /* parity error ack */
137: #define IEVME_PARSRC 0x0080 /* parity error source */
138: #define IEVME_PAREND 0x0040 /* which end of the data got the error */
139: #define IEVME_PARADR 0x000f /* mask to get bits 17-20 of parity address */
140:
141:
142: /*
143: * PART 2: the on-board interface
144: */
145: struct ieob {
146: u_char obctrl;
147: };
148: #define IEOB_NORSET 0x80 /* don't reset the board */
149: #define IEOB_ONAIR 0x40 /* put us on the air */
150: #define IEOB_ATTEN 0x20 /* attention! */
151: #define IEOB_IENAB 0x10 /* interrupt enable */
152: #define IEOB_XXXXX 0x08 /* free bit */
153: #define IEOB_XCVRL2 0x04 /* level 2 transceiver? */
154: #define IEOB_BUSERR 0x02 /* bus error */
155: #define IEOB_INT 0x01 /* interrupt */
156:
157: #define IEOB_ADBASE 0xff000000 /* KVA base addr of 24 bit address space */
158:
159: /*
160: * PART 3: the 3E board
161: */
162:
163: /*
164: * not supported (yet?)
165: */
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to if_ie.h CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / arch / sparc / dev