Annotation of sys/arch/sparc/dev/hmevar.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: hmevar.h,v 1.12 2006/06/02 20:00:54 miod Exp $ */
2:
3: /*
4: * Copyright (c) 1998 Jason L. Wright (jason@thought.net)
5: * All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: *
16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19: * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25: * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26: * POSSIBILITY OF SUCH DAMAGE.
27: */
28:
29: struct hme_softc {
30: struct device sc_dev; /* base device */
31: struct intrhand sc_ih; /* interrupt vectoring */
32: int sc_node; /* which sbus node */
33:
34: mii_data_t sc_mii; /* mii bus */
35:
36: struct arpcom sc_arpcom; /* ethernet common */
37:
38: /*
39: * Register sets
40: */
41: struct hme_gr *sc_gr; /* global registers */
42: struct hme_txr *sc_txr; /* transmitter regs */
43: struct hme_rxr *sc_rxr; /* receiver registers */
44: struct hme_cr *sc_cr; /* configuration registers */
45: struct hme_tcvr *sc_tcvr; /* MIF registers */
46:
47: int sc_burst; /* DMA burst size in effect */
48: int sc_rev; /* Card revision */
49:
50: u_int32_t sc_flags; /* status flags */
51:
52: short sc_if_flags;
53:
54: /*
55: * RX/TX ring buffers, descriptors, and counters
56: */
57: struct hme_desc *sc_desc, *sc_desc_dva; /* ring descriptors */
58: struct hme_bufs *sc_bufs, *sc_bufs_dva; /* packet buffers */
59: int sc_first_td, sc_last_td, sc_no_td; /* tx counters */
60: int sc_last_rd; /* rx counters */
61: };
CVSweb