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File: [local] / sys / arch / sparc / dev / fdreg.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:08:03 2008 UTC (16 years, 6 months ago) by nbrk
Import of OpenBSD 4.2 release kernel tree with initial code to support Jornada 720/728, StrongARM 1110-based handheld PC. At this point kernel roots on NFS and boots into vfs_mountroot() and traps. What is supported: - glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode (needs some palette tweaks for non black/white/blue colors, i think) - saic, SA11x0 interrupt controller (needs cleanup) - sacom, SA11x0 UART (supported only as boot console for now) - SA11x0 GPIO controller fully supported (but can't handle multiple interrupt handlers on one gpio pin) - sassp, SSP port on SA11x0 that attaches spibus - Jornada microcontroller (jmcu) to control kbd, battery, etc throught the SPI bus (wskbd attaches on jmcu, but not tested) - tod functions seem work - initial code for SA-1111 (chip companion) : this is TODO Next important steps, i think: - gpio and intc on sa1111 - pcmcia support for sa11x0 (and sa1111 help logic) - REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs) - root on wd0! (using already supported PCMCIA-ATA) |
/* $OpenBSD: fdreg.h,v 1.5 2004/09/22 22:12:58 miod Exp $ */ /* $NetBSD: fdreg.h,v 1.6 1997/05/02 13:03:44 pk Exp $ */ /*- * Copyright (c) 1991 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * @(#)fdreg.h 7.1 (Berkeley) 5/9/91 */ /* * AT floppy controller registers and bitfields */ /* uses NEC765 controller */ #include <dev/ic/nec765reg.h> #ifndef _LOCORE struct fdreg_77 { u_int8_t fd_statusA; u_int8_t fd_statusB; u_int8_t fd_dor; /* Digital Output Register (R/W) */ u_int8_t fd_tdr; /* Tape Control Register (R/W) */ u_int8_t fd_msr; /* Main Status Register (R) */ #define fd_drs fd_msr /* Data Rate Select Register (W) */ u_int8_t fd_fifo; /* Data (FIFO) register (R/W) */ u_int8_t fd_reserved; u_int8_t fd_dir; /* Digital Input Register (R) */ #define fd_ccr fd_dir /* Configuration Control (W) */ }; struct fdreg_72 { u_int8_t fd_msr; /* Main Status Register (R) */ #if already_a_define #define fd_drs fd_msr /* Data Rate Select Register (W) */ #endif u_int8_t fd_fifo; /* Data (FIFO) register (R/W) */ }; union fdreg { struct fdreg_72 fun72; struct fdreg_77 fun77; }; #endif /* Data Select Register bits */ #define DRS_RESET 0x80 #define DRS_POWER 0x40 #define DRS_PLL 0x20 #define FDC_500KBPS 0x00 /* 500KBPS MFM drive transfer rate */ #define FDC_300KBPS 0x01 /* 300KBPS MFM drive transfer rate */ #define FDC_250KBPS 0x02 /* 250KBPS MFM drive transfer rate */ #define FDC_125KBPS 0x03 /* 125KBPS FM drive transfer rate */ /* Digital Output Register bits (modified on suns) */ #define FDO_DS 0x01 /* floppy device select (neg) */ #define FDO_FRST 0x04 /* floppy controller reset (neg) */ #define FDO_FDMAEN 0x08 /* enable floppy DMA and Interrupt */ #define FDO_MOEN(n) ((1 << n) << 4) /* motor enable */ #define FDO_DEN 0x40 /* Density select */ #define FDO_EJ 0x80 /* Eject disk */ /* Digital Input Register bits */ #define FDI_DCHG 0x80 /* diskette has been changed */ /* XXX - find a place for these... */ #define NE7CMD_CFG 0x13 #define CFG_EIS 0x40 #define CFG_EFIFO 0x20 #define CFG_POLL 0x10 #define CFG_THRHLD_MASK 0x0f #define NE7CMD_LOCK 0x14 #define CFG_LOCK 0x80 #define NE7CMD_MOTOR 0x0b #define MOTOR_ON 0x80 #define NE7CMD_DUMPREG 0x0e #define NE7CMD_VERSION 0x10 #define ST1_OVERRUN 0x10 #define NE7_SPECIFY_NODMA 0x01