Annotation of sys/arch/sparc/dev/dmareg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: dmareg.h,v 1.7 2005/02/27 22:01:04 miod Exp $ */
2: /* $NetBSD: dmareg.h,v 1.10 1996/11/28 09:37:34 pk Exp $ */
3:
4: /*
5: * Copyright (c) 1994 Peter Galbavy. All rights reserved.
6: * Redistribution and use in source and binary forms, with or without
7: * modification, are permitted provided that the following conditions
8: * are met:
9: * 1. Redistributions of source code must retain the above copyright
10: * notice, this list of conditions and the following disclaimer.
11: * 2. Redistributions in binary form must reproduce the above copyright
12: * notice, this list of conditions and the following disclaimer in the
13: * documentation and/or other materials provided with the distribution.
14: *
15: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25: */
26:
27: #include <dev/ic/lsi64854reg.h>
28:
29: struct dma_regs {
30: volatile u_long csr; /* DMA CSR */
31: volatile caddr_t addr;
32: volatile u_long bcnt; /* DMA COUNT (in u_longs) */
33: volatile u_long test; /* DMA TEST (in u_longs) */
34: #define en_testcsr addr /* enet registers overlap */
35: #define en_cachev bcnt
36: #define en_bar test
37: };
38:
39: /*
40: * PROM-reported DMA burst sizes for the SBus
41: */
42: #define SBUS_BURST_1 0x1
43: #define SBUS_BURST_2 0x2
44: #define SBUS_BURST_4 0x4
45: #define SBUS_BURST_8 0x8
46: #define SBUS_BURST_16 0x10
47: #define SBUS_BURST_32 0x20
48: #define SBUS_BURST_64 0x40
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