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Annotation of sys/arch/sparc/dev/cgfourteenreg.h, Revision 1.1

1.1     ! nbrk        1: /*     $OpenBSD: cgfourteenreg.h,v 1.4 2005/03/15 18:50:43 miod Exp $  */
        !             2: /*     $NetBSD: cgfourteenreg.h,v 1.1 1996/09/30 22:41:02 abrown Exp $ */
        !             3:
        !             4: /*
        !             5:  * Copyright (c) 1996
        !             6:  *     The President and Fellows of Harvard College. All rights reserved.
        !             7:  *
        !             8:  * Redistribution and use in source and binary forms, with or without
        !             9:  * modification, are permitted provided that the following conditions
        !            10:  * are met:
        !            11:  * 1. Redistributions of source code must retain the above copyright
        !            12:  *    notice, this list of conditions and the following disclaimer.
        !            13:  * 2. Redistributions in binary form must reproduce the above copyright
        !            14:  *    notice, this list of conditions and the following disclaimer in the
        !            15:  *    documentation and/or other materials provided with the distribution.
        !            16:  * 3. All advertising materials mentioning features or use of this software
        !            17:  *    must display the following acknowledgement:
        !            18:  *     This product includes software developed by Harvard University and
        !            19:  *     its contributors.
        !            20:  * 4. Neither the name of the University nor the names of its contributors
        !            21:  *    may be used to endorse or promote products derived from this software
        !            22:  *    without specific prior written permission.
        !            23:  *
        !            24:  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
        !            25:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
        !            26:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
        !            27:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
        !            28:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
        !            29:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
        !            30:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
        !            31:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
        !            32:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
        !            33:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
        !            34:  * SUCH DAMAGE.
        !            35:  */
        !            36:
        !            37: /*
        !            38:  * Register/dac/clut/cursor definitions for cgfourteen frame buffer
        !            39:  */
        !            40:
        !            41: /* Control registers */
        !            42: #define        CG14_REG_CONTROL        0
        !            43: #define        CG14_REG_VRAM           1
        !            44:
        !            45: #define        CG14_NREG               2
        !            46:
        !            47: /* Locations of control registers in cg14 register set */
        !            48: #define        CG14_OFFSET_CURS        0x1000
        !            49: #define CG14_OFFSET_DAC                0x2000
        !            50: #define CG14_OFFSET_XLUT       0x3000
        !            51: #define CG14_OFFSET_CLUT1      0x4000
        !            52: #define CG14_OFFSET_CLUT2      0x5000
        !            53: #define CG14_OFFSET_CLUT3      0x6000
        !            54: #define CG14_OFFSET_AUTOINCR   0xf000
        !            55:
        !            56: /* Main control register set */
        !            57: struct cg14ctl {
        !            58:        volatile u_int8_t       ctl_mctl;       /* main control register */
        !            59: #define CG14_MCTL_ENABLEINTR   0x80            /* interrupts */
        !            60: #define CG14_MCTL_R0_ENABLEHW  0x40            /* hardware enable */
        !            61: #define        CG14_MCTL_R1_ENABLEHW   0x01
        !            62: #define        CG14_MCTL_R1_ENABLEVID  0x40            /* display enable */
        !            63: #define CG14_MCTL_PIXMODE_MASK 0x30
        !            64: #define                CG14_MCTL_PIXMODE_8     0x00    /* data is 16 8-bit pixels */
        !            65: #define                CG14_MCTL_PIXMODE_16    0x20    /* data is 8 16-bit pixels */
        !            66: #define                CG14_MCTL_PIXMODE_32    0x30    /* data is 4 32-bit pixels */
        !            67: #define CG14_MCTL_PIXMODE_SHIFT        4
        !            68: #define        CG14_MCTL_TMR           0x0c
        !            69: #define CG14_MCTL_ENABLETMR    0x02
        !            70: #define CG14_MCTL_R0_RESET     0x01
        !            71:        volatile u_int8_t       ctl_ppr;        /* packed pixel register */
        !            72:        volatile u_int8_t       ctl_tmsr0;      /* test status reg. 0 */
        !            73:        volatile u_int8_t       ctl_tmsr1;      /* test status reg. 1 */
        !            74:        volatile u_int8_t       ctl_msr;        /* master status register */
        !            75: #define        CG14_MSR_PENDING        0x20            /* interrupt pending */
        !            76: #define        CG14_MSR_VRETRACE       0x10            /* vertical retrace interrupt */
        !            77: #define        CG14_MSR_FAULT          0x01            /* fault interrupt */
        !            78:        volatile u_int8_t       ctl_fsr;        /* fault status register */
        !            79:        volatile u_int8_t       ctl_rsr;        /* revision status register */
        !            80: #define CG14_RSR_REVMASK       0xf0            /*  mask to get revision */
        !            81: #define CG14_RSR_REVSHIFT      4
        !            82: #define CG14_RSR_IMPLMASK      0x0f            /*  mask to get impl. code */
        !            83:        volatile u_int8_t       ctl_ccr;        /* clock control register */
        !            84:        /* XXX etc. */
        !            85: };
        !            86:
        !            87: /* Hardware cursor map */
        !            88: #define CG14_CURS_SIZE         32
        !            89: #define        CG14_CURS_MASK          0x1f
        !            90: struct cg14curs {
        !            91:        volatile u_int32_t      curs_plane0[CG14_CURS_SIZE];    /* plane 0 */
        !            92:        volatile u_int32_t      curs_plane1[CG14_CURS_SIZE];
        !            93:        volatile u_int8_t       curs_ctl;       /* control register */
        !            94: #define CG14_CURS_ENABLE       0x4
        !            95: #define CG14_CURS_DOUBLEBUFFER 0x2             /* use X-channel for curs */
        !            96:        volatile u_int8_t       pad0[3];
        !            97:        volatile u_int16_t      curs_x;         /* x position */
        !            98:        volatile u_int16_t      curs_y;         /* y position */
        !            99:        volatile u_int32_t      curs_color1;    /* color register 1 */
        !           100:        volatile u_int32_t      curs_color2;    /* color register 2 */
        !           101:        volatile u_int32_t      pad[444];       /* pad to 2KB boundary */
        !           102:        volatile u_int32_t      curs_plane0incr[CG14_CURS_SIZE]; /* autoincr */
        !           103:        volatile u_int32_t      curs_plane1incr[CG14_CURS_SIZE]; /* autoincr */
        !           104: };
        !           105:
        !           106: /* DAC */
        !           107: struct cg14dac {
        !           108:        volatile u_int8_t       dac_addr;       /* address register */
        !           109:        volatile u_int8_t       pad0[255];
        !           110:        volatile u_int8_t       dac_gammalut;   /* gamma LUT */
        !           111:        volatile u_int8_t       pad1[255];
        !           112:        volatile u_int8_t       dac_regsel;     /* register select */
        !           113:        volatile u_int8_t       pad2[255];
        !           114:        volatile u_int8_t       dac_mode;       /* mode register */
        !           115: };
        !           116:
        !           117: #define CG14_CLUT_SIZE 256
        !           118:
        !           119: /* XLUT registers */
        !           120: struct cg14xlut {
        !           121:        volatile u_int8_t       xlut_lut[CG14_CLUT_SIZE];       /* the LUT */
        !           122:        volatile u_int8_t       xlut_lutd[CG14_CLUT_SIZE];      /* ??? */
        !           123:        volatile u_int8_t       pad0[0x600];
        !           124:        volatile u_int8_t       xlut_lutinc[CG14_CLUT_SIZE];    /* autoincrLUT*/
        !           125:        volatile u_int8_t       xlut_lutincd[CG14_CLUT_SIZE];
        !           126: };
        !           127:
        !           128: /* Color Look-Up Table (CLUT) */
        !           129: struct cg14clut {
        !           130:        volatile u_int32_t      clut_lut[CG14_CLUT_SIZE];       /* the LUT */
        !           131:        volatile u_int32_t      clut_lutd[CG14_CLUT_SIZE];      /* ??? */
        !           132:        volatile u_int32_t      clut_lutinc[CG14_CLUT_SIZE];    /* autoincr */
        !           133:        volatile u_int32_t      clut_lutincd[CG14_CLUT_SIZE];
        !           134: };