[BACK]Return to btreg.h CVS log [TXT][DIR] Up to [local] / sys / arch / sparc / dev

Annotation of sys/arch/sparc/dev/btreg.h, Revision 1.1

1.1     ! nbrk        1: /*     $OpenBSD: btreg.h,v 1.5 2007/05/29 09:54:05 sobrado Exp $       */
        !             2: /*     $NetBSD: btreg.h,v 1.4 1996/02/27 22:09:21 thorpej Exp $ */
        !             3:
        !             4: /*
        !             5:  * Copyright (c) 1993
        !             6:  *     The Regents of the University of California.  All rights reserved.
        !             7:  *
        !             8:  * This software was developed by the Computer Systems Engineering group
        !             9:  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
        !            10:  * contributed to Berkeley.
        !            11:  *
        !            12:  * All advertising materials mentioning features or use of this software
        !            13:  * must display the following acknowledgement:
        !            14:  *     This product includes software developed by the University of
        !            15:  *     California, Lawrence Berkeley Laboratory.
        !            16:  *
        !            17:  * Redistribution and use in source and binary forms, with or without
        !            18:  * modification, are permitted provided that the following conditions
        !            19:  * are met:
        !            20:  * 1. Redistributions of source code must retain the above copyright
        !            21:  *    notice, this list of conditions and the following disclaimer.
        !            22:  * 2. Redistributions in binary form must reproduce the above copyright
        !            23:  *    notice, this list of conditions and the following disclaimer in the
        !            24:  *    documentation and/or other materials provided with the distribution.
        !            25:  * 3. Neither the name of the University nor the names of its contributors
        !            26:  *    may be used to endorse or promote products derived from this software
        !            27:  *    without specific prior written permission.
        !            28:  *
        !            29:  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
        !            30:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
        !            31:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
        !            32:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
        !            33:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
        !            34:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
        !            35:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
        !            36:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
        !            37:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
        !            38:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
        !            39:  * SUCH DAMAGE.
        !            40:  *
        !            41:  *     @(#)btreg.h     8.2 (Berkeley) 1/21/94
        !            42:  */
        !            43:
        !            44: /*
        !            45:  * Several Sun color frame buffers use some kind of Brooktree video
        !            46:  * DAC (e.g., the Bt458, -- in any case, Brooktree make the only
        !            47:  * decent color frame buffer chips).
        !            48:  *
        !            49:  * Color map control on these is a bit funky in a SPARCstation.
        !            50:  * To update the color map one would normally do byte writes, but
        !            51:  * the hardware takes longword writes.  Since there are three
        !            52:  * registers for each color map entry (R, then G, then B), we have
        !            53:  * to set color 1 with a write to address 0 (setting 0's R/G/B and
        !            54:  * color 1's R) followed by a second write to address 1 (setting
        !            55:  * color 1's G/B and color 2's R/G).  Software must therefore keep
        !            56:  * a copy of the current map.
        !            57:  *
        !            58:  * The colormap address register increments automatically, so the
        !            59:  * above write is done as:
        !            60:  *
        !            61:  *     bt->bt_addr = 0;
        !            62:  *     bt->bt_cmap = R0G0B0R1;
        !            63:  *     bt->bt_cmap = G1B1R2G2;
        !            64:  *     ...
        !            65:  *
        !            66:  * Yow!
        !            67:  *
        !            68:  * Bonus complication: on the cg6, only the top 8 bits of each 32 bit
        !            69:  * register matter, even though the cg3 takes all the bits from all
        !            70:  * bytes written to it.
        !            71:  */
        !            72: struct bt_regs {
        !            73:        u_int   bt_addr;                /* map address register */
        !            74:        u_int   bt_cmap;                /* colormap data register */
        !            75:        u_int   bt_ctrl;                /* control register */
        !            76:        u_int   bt_omap;                /* overlay (cursor) map register */
        !            77: };
        !            78: #define BT_INIT(bt, shift) do { /* whatever this means.. */ \
        !            79:        (bt)->bt_addr = 0x06 << (shift);        /* command reg */ \
        !            80:        (bt)->bt_ctrl = 0x73 << (shift);        /* overlay plane */ \
        !            81:        (bt)->bt_addr = 0x04 << (shift);        /* read mask */ \
        !            82:        (bt)->bt_ctrl = 0xff << (shift);        /* color planes */ \
        !            83: } while(0)
        !            84: #define BT_UNBLANK(bt, x, shift) do { \
        !            85:        /* restore color 0 (and R of color 1) */ \
        !            86:        (bt)->bt_addr = 0 << (shift); \
        !            87:        (bt)->bt_cmap = (x); \
        !            88:        if ((shift)) { \
        !            89:                (bt)->bt_cmap = (x) << 8; \
        !            90:                (bt)->bt_cmap = (x) << 16; \
        !            91:        /* restore read mask */ \
        !            92:        BT_INIT((bt), (shift)); \
        !            93: } while(0)
        !            94: #define BT_BLANK(bt, shift) do { \
        !            95:        (bt)->bt_addr = 0x06 << (shift);        /* command reg */ \
        !            96:        (bt)->bt_ctrl = 0x70 << (shift);        /* overlay plane */ \
        !            97:        (bt)->bt_addr = 0x04 << (shift);        /* read mask */ \
        !            98:        (bt)->bt_ctrl = 0x00 << (shift);        /* color planes */ \
        !            99:        /* Set color 0 to black -- note that this overwrites R of color 1. */\
        !           100:        (bt)->bt_addr = 0 << (shift); \
        !           101:        (bt)->bt_cmap = 0 << (shift); \
        !           102:        /* restore read mask */ \
        !           103:        BT_INIT((bt), (shift)); \
        !           104: } while(0)
        !           105:
        !           106:
        !           107: /*
        !           108:  * SBus framebuffer control look like this (usually at offset 0x400000).
        !           109:  */
        !           110: struct fbcontrol {
        !           111:        struct  bt_regs fbc_dac;
        !           112:        u_char  fbc_ctrl;
        !           113:        u_char  fbc_status;
        !           114:        u_char  fbc_cursor_start;
        !           115:        u_char  fbc_cursor_end;
        !           116:        u_char  fbc_vcontrol[12];       /* 12 bytes of video timing goo */
        !           117: };
        !           118: /* fbc_ctrl bits: */
        !           119: #define FBC_IENAB      0x80            /* Interrupt enable */
        !           120: #define FBC_VENAB      0x40            /* Video enable */
        !           121: #define FBC_TIMING     0x20            /* Master timing enable */
        !           122: #define FBC_CURSOR     0x10            /* Cursor compare enable */
        !           123: #define FBC_XTALMSK    0x0c            /* Xtal select (0,1,2,test) */
        !           124: #define FBC_DIVMSK     0x03            /* Divisor (1,2,3,4) */
        !           125:
        !           126: /* fbc_status bits: */
        !           127: #define FBS_INTR       0x80            /* Interrupt pending */
        !           128: #define FBS_MSENSE     0x70            /* Monitor sense mask */
        !           129: #define                FBS_1024X768    0x10
        !           130: #define                FBS_1152X900    0x30
        !           131: #define                FBS_1280X1024   0x40
        !           132: #define                FBS_1600X1280   0x50
        !           133: #define FBS_ID_MASK    0x0f            /* ID mask */
        !           134: #define                FBS_ID_COLOR    0x01
        !           135: #define                FBS_ID_MONO     0x02
        !           136: #define                FBS_ID_MONO_ECL 0x03    /* ? */
        !           137:

CVSweb