Annotation of sys/arch/sh/sh/devreg.c, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: devreg.c,v 1.1.1.1 2006/10/06 21:02:55 miod Exp $ */
! 2: /* $NetBSD: devreg.c,v 1.6 2006/03/04 01:13:35 uwe Exp $ */
! 3:
! 4: /*-
! 5: * Copyright (c) 2002 The NetBSD Foundation, Inc.
! 6: * All rights reserved.
! 7: *
! 8: * Redistribution and use in source and binary forms, with or without
! 9: * modification, are permitted provided that the following conditions
! 10: * are met:
! 11: * 1. Redistributions of source code must retain the above copyright
! 12: * notice, this list of conditions and the following disclaimer.
! 13: * 2. Redistributions in binary form must reproduce the above copyright
! 14: * notice, this list of conditions and the following disclaimer in the
! 15: * documentation and/or other materials provided with the distribution.
! 16: * 3. All advertising materials mentioning features or use of this software
! 17: * must display the following acknowledgement:
! 18: * This product includes software developed by the NetBSD
! 19: * Foundation, Inc. and its contributors.
! 20: * 4. Neither the name of The NetBSD Foundation nor the names of its
! 21: * contributors may be used to endorse or promote products derived
! 22: * from this software without specific prior written permission.
! 23: *
! 24: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 25: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 26: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 27: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
! 28: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 29: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 30: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 31: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 32: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 33: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 34: * POSSIBILITY OF SUCH DAMAGE.
! 35: */
! 36:
! 37: #include <sys/param.h>
! 38:
! 39: #include <sh/cache_sh3.h>
! 40: #include <sh/cache_sh4.h>
! 41: #include <sh/mmu_sh3.h>
! 42: #include <sh/mmu_sh4.h>
! 43: #include <sh/trap.h>
! 44:
! 45: #include <sh/ubcreg.h>
! 46: #include <sh/rtcreg.h>
! 47: #include <sh/tmureg.h>
! 48:
! 49: /* MMU */
! 50: uint32_t __sh_PTEH;
! 51: uint32_t __sh_TTB;
! 52: uint32_t __sh_TEA;
! 53: uint32_t __sh_TRA;
! 54: uint32_t __sh_EXPEVT;
! 55: uint32_t __sh_INTEVT;
! 56:
! 57: /* UBC */
! 58: uint32_t __sh_BARA;
! 59: uint32_t __sh_BAMRA;
! 60: uint32_t __sh_BASRA;
! 61: uint32_t __sh_BBRA;
! 62: uint32_t __sh_BARB;
! 63: uint32_t __sh_BAMRB;
! 64: uint32_t __sh_BASRB;
! 65: uint32_t __sh_BBRB;
! 66: uint32_t __sh_BDRB;
! 67: uint32_t __sh_BDMRB;
! 68: uint32_t __sh_BRCR;
! 69:
! 70: /* RTC */
! 71: uint32_t __sh_R64CNT;
! 72: uint32_t __sh_RSECCNT;
! 73: uint32_t __sh_RMINCNT;
! 74: uint32_t __sh_RHRCNT;
! 75: uint32_t __sh_RWKCNT;
! 76: uint32_t __sh_RDAYCNT;
! 77: uint32_t __sh_RMONCNT;
! 78: uint32_t __sh_RYRCNT;
! 79: uint32_t __sh_RSECAR;
! 80: uint32_t __sh_RMINAR;
! 81: uint32_t __sh_RHRAR;
! 82: uint32_t __sh_RWKAR;
! 83: uint32_t __sh_RDAYAR;
! 84: uint32_t __sh_RMONAR;
! 85: uint32_t __sh_RCR1;
! 86: uint32_t __sh_RCR2;
! 87:
! 88: /* TMU */
! 89: uint32_t __sh_TOCR;
! 90: uint32_t __sh_TSTR;
! 91: uint32_t __sh_TCOR0;
! 92: uint32_t __sh_TCNT0;
! 93: uint32_t __sh_TCR0;
! 94: uint32_t __sh_TCOR1;
! 95: uint32_t __sh_TCNT1;
! 96: uint32_t __sh_TCR1;
! 97: uint32_t __sh_TCOR2;
! 98: uint32_t __sh_TCNT2;
! 99: uint32_t __sh_TCR2;
! 100: uint32_t __sh_TCPR2;
! 101:
! 102: #define SH3REG(x) __sh_ ## x = SH3_ ## x
! 103: #define SH4REG(x) __sh_ ## x = SH4_ ## x
! 104:
! 105: #define SHREG(x) \
! 106: do { \
! 107: /* Exception */ \
! 108: SH ## x ## REG(TRA); \
! 109: SH ## x ## REG(EXPEVT); \
! 110: SH ## x ## REG(INTEVT); \
! 111: /* UBC */ \
! 112: SH ## x ## REG(BARA); \
! 113: SH ## x ## REG(BAMRA); \
! 114: SH ## x ## REG(BASRA); \
! 115: SH ## x ## REG(BBRA); \
! 116: SH ## x ## REG(BARB); \
! 117: SH ## x ## REG(BAMRB); \
! 118: SH ## x ## REG(BASRB); \
! 119: SH ## x ## REG(BBRB); \
! 120: SH ## x ## REG(BDRB); \
! 121: SH ## x ## REG(BDMRB); \
! 122: SH ## x ## REG(BRCR); \
! 123: /* MMU */ \
! 124: SH ## x ## REG(PTEH); \
! 125: SH ## x ## REG(TEA); \
! 126: SH ## x ## REG(TTB); \
! 127: /* RTC */ \
! 128: SH ## x ## REG(R64CNT); \
! 129: SH ## x ## REG(RSECCNT); \
! 130: SH ## x ## REG(RMINCNT); \
! 131: SH ## x ## REG(RHRCNT); \
! 132: SH ## x ## REG(RWKCNT); \
! 133: SH ## x ## REG(RDAYCNT); \
! 134: SH ## x ## REG(RMONCNT); \
! 135: SH ## x ## REG(RYRCNT); \
! 136: SH ## x ## REG(RSECAR); \
! 137: SH ## x ## REG(RMINAR); \
! 138: SH ## x ## REG(RHRAR); \
! 139: SH ## x ## REG(RWKAR); \
! 140: SH ## x ## REG(RDAYAR); \
! 141: SH ## x ## REG(RMONAR); \
! 142: SH ## x ## REG(RCR1); \
! 143: SH ## x ## REG(RCR2); \
! 144: /* TMU */ \
! 145: SH ## x ## REG(TOCR); \
! 146: SH ## x ## REG(TSTR); \
! 147: SH ## x ## REG(TCOR0); \
! 148: SH ## x ## REG(TCNT0); \
! 149: SH ## x ## REG(TCR0); \
! 150: SH ## x ## REG(TCOR1); \
! 151: SH ## x ## REG(TCNT1); \
! 152: SH ## x ## REG(TCR1); \
! 153: SH ## x ## REG(TCOR2); \
! 154: SH ## x ## REG(TCNT2); \
! 155: SH ## x ## REG(TCR2); \
! 156: SH ## x ## REG(TCPR2); \
! 157: } while (/*CONSTCOND*/0)
! 158:
! 159: void
! 160: sh_devreg_init()
! 161: {
! 162: if (CPU_IS_SH3)
! 163: SHREG(3);
! 164:
! 165: if (CPU_IS_SH4)
! 166: SHREG(4);
! 167: }
CVSweb