Annotation of sys/arch/sh/include/trap.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: trap.h,v 1.2 2007/02/06 23:14:09 miod Exp $ */
! 2: /* $NetBSD: exception.h,v 1.9 2006/07/22 21:58:29 uwe Exp $ */
! 3:
! 4: /*-
! 5: * Copyright (c) 2002 The NetBSD Foundation, Inc.
! 6: * All rights reserved.
! 7: *
! 8: * Redistribution and use in source and binary forms, with or without
! 9: * modification, are permitted provided that the following conditions
! 10: * are met:
! 11: * 1. Redistributions of source code must retain the above copyright
! 12: * notice, this list of conditions and the following disclaimer.
! 13: * 2. Redistributions in binary form must reproduce the above copyright
! 14: * notice, this list of conditions and the following disclaimer in the
! 15: * documentation and/or other materials provided with the distribution.
! 16: * 3. All advertising materials mentioning features or use of this software
! 17: * must display the following acknowledgement:
! 18: * This product includes software developed by the NetBSD
! 19: * Foundation, Inc. and its contributors.
! 20: * 4. Neither the name of The NetBSD Foundation nor the names of its
! 21: * contributors may be used to endorse or promote products derived
! 22: * from this software without specific prior written permission.
! 23: *
! 24: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 25: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 26: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 27: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
! 28: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 29: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 30: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 31: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 32: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 33: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 34: * POSSIBILITY OF SUCH DAMAGE.
! 35: */
! 36:
! 37: #ifndef _SH_EXCEPTION_H_
! 38: #define _SH_EXCEPTION_H_
! 39: /*
! 40: * SH3/SH4 Exception handling.
! 41: */
! 42: #include <sh/devreg.h>
! 43:
! 44: #ifdef _KERNEL
! 45: #define SH3_TRA 0xffffffd0 /* 32bit */
! 46: #define SH3_EXPEVT 0xffffffd4 /* 32bit */
! 47: #define SH3_INTEVT 0xffffffd8 /* 32bit */
! 48: #define SH7709_INTEVT2 0xa4000000 /* 32bit */
! 49:
! 50: #define SH4_TRA 0xff000020 /* 32bit */
! 51: #define SH4_EXPEVT 0xff000024 /* 32bit */
! 52: #define SH4_INTEVT 0xff000028 /* 32bit */
! 53:
! 54: /*
! 55: * EXPEVT
! 56: */
! 57: /* Reset exception */
! 58: #define EXPEVT_RESET_POWER 0x000 /* Power-On reset */
! 59: #define EXPEVT_RESET_MANUAL 0x020 /* Manual reset */
! 60: #define EXPEVT_RESET_TLB_MULTI_HIT 0x140 /* SH4 only */
! 61:
! 62: /* General exception */
! 63: #define EXPEVT_TLB_MISS_LD 0x040 /* TLB miss (load) */
! 64: #define EXPEVT_TLB_MISS_ST 0x060 /* TLB miss (store) */
! 65: #define EXPEVT_TLB_MOD 0x080 /* Initial page write */
! 66: #define EXPEVT_TLB_PROT_LD 0x0a0 /* Protection violation (load) */
! 67: #define EXPEVT_TLB_PROT_ST 0x0c0 /* Protection violation (store)*/
! 68: #define EXPEVT_ADDR_ERR_LD 0x0e0 /* Address error (load) */
! 69: #define EXPEVT_ADDR_ERR_ST 0x100 /* Address error (store) */
! 70: #define EXPEVT_FPU 0x120 /* FPU exception */
! 71: #define EXPEVT_TRAPA 0x160 /* Unconditional trap (TRAPA) */
! 72: #define EXPEVT_RES_INST 0x180 /* Illegal instruction */
! 73: #define EXPEVT_SLOT_INST 0x1a0 /* Illegal slot instruction */
! 74: #define EXPEVT_BREAK 0x1e0 /* User break */
! 75: #define EXPEVT_FPU_DISABLE 0x800 /* FPU disabled */
! 76: #define EXPEVT_FPU_SLOT_DISABLE 0x820 /* Slot FPU disabled */
! 77:
! 78: /* Software bit */
! 79: #define EXP_USER 0x001 /* exception from user-mode */
! 80:
! 81: #define _SH_TRA_SYSCALL 0x80 /* syscall trapa number */
! 82: #define _SH_TRA_CACHECTL 0x81 /* cachectl trapa number */
! 83: #define _SH_TRA_BREAK 0xc3 /* magic number for debugger */
! 84:
! 85: /*
! 86: * INTEVT/INTEVT2
! 87: */
! 88: /* External interrupt */
! 89: #define SH_INTEVT_NMI 0x1c0
! 90:
! 91: #define SH_INTEVT_TMU0_TUNI0 0x400
! 92: #define SH_INTEVT_TMU1_TUNI1 0x420
! 93: #define SH_INTEVT_TMU2_TUNI2 0x440
! 94: #define SH_INTEVT_TMU2_TICPI2 0x460
! 95:
! 96: #define SH_INTEVT_SCI_ERI 0x4e0
! 97: #define SH_INTEVT_SCI_RXI 0x500
! 98: #define SH_INTEVT_SCI_TXI 0x520
! 99: #define SH_INTEVT_SCI_TEI 0x540
! 100:
! 101: #define SH_INTEVT_WDT_ITI 0x560
! 102:
! 103: #define SH_INTEVT_IRL9 0x320
! 104: #define SH_INTEVT_IRL11 0x360
! 105: #define SH_INTEVT_IRL13 0x3a0
! 106:
! 107: #define SH4_INTEVT_SCIF_ERI 0x700
! 108: #define SH4_INTEVT_SCIF_RXI 0x720
! 109: #define SH4_INTEVT_SCIF_BRI 0x740
! 110: #define SH4_INTEVT_SCIF_TXI 0x760
! 111:
! 112: #define SH7709_INTEVT2_IRQ0 0x600
! 113: #define SH7709_INTEVT2_IRQ1 0x620
! 114: #define SH7709_INTEVT2_IRQ2 0x640
! 115: #define SH7709_INTEVT2_IRQ3 0x660
! 116: #define SH7709_INTEVT2_IRQ4 0x680
! 117: #define SH7709_INTEVT2_IRQ5 0x6a0
! 118:
! 119: #define SH7709_INTEVT2_PINT07 0x700
! 120: #define SH7709_INTEVT2_PINT8F 0x720
! 121:
! 122: #define SH7709_INTEVT2_DEI0 0x800
! 123: #define SH7709_INTEVT2_DEI1 0x820
! 124: #define SH7709_INTEVT2_DEI2 0x840
! 125: #define SH7709_INTEVT2_DEI3 0x860
! 126:
! 127: #define SH7709_INTEVT2_IRDA_ERI 0x880
! 128: #define SH7709_INTEVT2_IRDA_RXI 0x8a0
! 129: #define SH7709_INTEVT2_IRDA_BRI 0x8c0
! 130: #define SH7709_INTEVT2_IRDA_TXI 0x8e0
! 131:
! 132: #define SH7709_INTEVT2_SCIF_ERI 0x900
! 133: #define SH7709_INTEVT2_SCIF_RXI 0x920
! 134: #define SH7709_INTEVT2_SCIF_BRI 0x940
! 135: #define SH7709_INTEVT2_SCIF_TXI 0x960
! 136:
! 137: #define SH7709_INTEVT2_ADC 0x980
! 138:
! 139: /* SH7750R, SH7751, SH7751R */
! 140: #define SH4_INTEVT_IRL0 0x240
! 141: #define SH4_INTEVT_IRL1 0x2a0
! 142: #define SH4_INTEVT_IRL2 0x300
! 143: #define SH4_INTEVT_IRL3 0x360
! 144:
! 145: #define SH4_INTEVT_IRQ0 0x200
! 146: #define SH4_INTEVT_IRQ1 0x220
! 147: #define SH4_INTEVT_IRQ2 0x240
! 148: #define SH4_INTEVT_IRQ3 0x260
! 149: #define SH4_INTEVT_IRQ4 0x280
! 150: #define SH4_INTEVT_IRQ5 0x2a0
! 151: #define SH4_INTEVT_IRQ6 0x2c0
! 152: #define SH4_INTEVT_IRQ7 0x2e0
! 153: #define SH4_INTEVT_IRQ8 0x300
! 154: #define SH4_INTEVT_IRQ9 0x320
! 155: #define SH4_INTEVT_IRQ10 0x340
! 156: #define SH4_INTEVT_IRQ11 0x360
! 157: #define SH4_INTEVT_IRQ12 0x380
! 158: #define SH4_INTEVT_IRQ13 0x3a0
! 159: #define SH4_INTEVT_IRQ14 0x3c0
! 160: #define SH4_INTEVT_IRQ15 0x3e0
! 161:
! 162: #define SH4_INTEVT_TMU3 0xb00
! 163: #define SH4_INTEVT_TMU4 0xb80
! 164:
! 165: #define SH4_INTEVT_PCISERR 0xa00
! 166: #define SH4_INTEVT_PCIERR 0xae0
! 167: #define SH4_INTEVT_PCIPWDWN 0xac0
! 168: #define SH4_INTEVT_PCIPWON 0xaa0
! 169: #define SH4_INTEVT_PCIDMA0 0xa80
! 170: #define SH4_INTEVT_PCIDMA1 0xa60
! 171: #define SH4_INTEVT_PCIDMA2 0xa40
! 172: #define SH4_INTEVT_PCIDMA3 0xa20
! 173:
! 174: #ifndef _LOCORE
! 175:
! 176: #if defined(SH3) && defined(SH4)
! 177: extern uint32_t __sh_TRA;
! 178: extern uint32_t __sh_EXPEVT;
! 179: extern uint32_t __sh_INTEVT;
! 180: #endif /* SH3 && SH4 */
! 181:
! 182: extern const char * const exp_type[];
! 183: extern const int exp_types;
! 184:
! 185: #endif /* !_LOCORE */
! 186:
! 187: #endif /* _KERNEL */
! 188: #endif /* !_SH_EXCEPTION_H_ */
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