Annotation of sys/arch/sh/include/mmu.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: mmu.h,v 1.1.1.1 2006/10/06 21:02:55 miod Exp $ */
! 2: /* $NetBSD: mmu.h,v 1.9 2006/03/04 01:55:03 uwe Exp $ */
! 3:
! 4: /*-
! 5: * Copyright (c) 2002 The NetBSD Foundation, Inc.
! 6: * All rights reserved.
! 7: *
! 8: * This code is derived from software contributed to The NetBSD Foundation
! 9: * by UCHIYAMA Yasushi.
! 10: *
! 11: * Redistribution and use in source and binary forms, with or without
! 12: * modification, are permitted provided that the following conditions
! 13: * are met:
! 14: * 1. Redistributions of source code must retain the above copyright
! 15: * notice, this list of conditions and the following disclaimer.
! 16: * 2. Redistributions in binary form must reproduce the above copyright
! 17: * notice, this list of conditions and the following disclaimer in the
! 18: * documentation and/or other materials provided with the distribution.
! 19: * 3. All advertising materials mentioning features or use of this software
! 20: * must display the following acknowledgement:
! 21: * This product includes software developed by the NetBSD
! 22: * Foundation, Inc. and its contributors.
! 23: * 4. Neither the name of The NetBSD Foundation nor the names of its
! 24: * contributors may be used to endorse or promote products derived
! 25: * from this software without specific prior written permission.
! 26: *
! 27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
! 31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 37: * POSSIBILITY OF SUCH DAMAGE.
! 38: */
! 39:
! 40: #ifndef _SH_MMU_H_
! 41: #define _SH_MMU_H_
! 42:
! 43: /*
! 44: * Initialize routines.
! 45: * sh_mmu_init Assign function vector. Don't access hardware.
! 46: * Call as early as possible.
! 47: * sh_mmu_start Reset TLB entry, set default ASID, and start to
! 48: * translate addresses.
! 49: * Call after exception vector was installed.
! 50: *
! 51: * TLB access ops.
! 52: * sh_tlb_invalidate_addr invalidate TLB entris for given
! 53: * virtual addr with ASID.
! 54: * sh_tlb_invalidate_asid invalidate TLB entries for given ASID.
! 55: * sh_tlb_invalidate_all invalidate all non-wired TLB entries.
! 56: * sh_tlb_set_asid set ASID.
! 57: * sh_tlb_update load new PTE to TLB.
! 58: *
! 59: */
! 60:
! 61: void sh_mmu_init(void);
! 62: void sh_mmu_information(void);
! 63: void sh_tlb_set_asid(int);
! 64:
! 65: #ifdef SH3
! 66: void sh3_mmu_start(void);
! 67: void sh3_tlb_invalidate_addr(int, vaddr_t);
! 68: void sh3_tlb_invalidate_asid(int);
! 69: void sh3_tlb_invalidate_all(void);
! 70: void sh3_tlb_update(int, vaddr_t, uint32_t);
! 71: #endif
! 72:
! 73: #ifdef SH4
! 74: void sh4_mmu_start(void);
! 75: void sh4_tlb_invalidate_addr(int, vaddr_t);
! 76: void sh4_tlb_invalidate_asid(int);
! 77: void sh4_tlb_invalidate_all(void);
! 78: void sh4_tlb_update(int, vaddr_t, uint32_t);
! 79: #endif
! 80:
! 81:
! 82: #if defined(SH3) && defined(SH4)
! 83: extern uint32_t __sh_PTEH;
! 84:
! 85: extern void (*__sh_mmu_start)(void);
! 86: extern void (*__sh_tlb_invalidate_addr)(int, vaddr_t);
! 87: extern void (*__sh_tlb_invalidate_asid)(int);
! 88: extern void (*__sh_tlb_invalidate_all)(void);
! 89: extern void (*__sh_tlb_update)(int, vaddr_t, uint32_t);
! 90:
! 91: #define sh_mmu_start() (*__sh_mmu_start)()
! 92: #define sh_tlb_invalidate_addr(a, va) (*__sh_tlb_invalidate_addr)(a, va)
! 93: #define sh_tlb_invalidate_asid(a) (*__sh_tlb_invalidate_asid)(a)
! 94: #define sh_tlb_invalidate_all() (*__sh_tlb_invalidate_all)()
! 95: #define sh_tlb_update(a, va, pte) (*__sh_tlb_update)(a, va, pte)
! 96:
! 97: #elif defined(SH3)
! 98:
! 99: #define sh_mmu_start() sh3_mmu_start()
! 100: #define sh_tlb_invalidate_addr(a, va) sh3_tlb_invalidate_addr(a, va)
! 101: #define sh_tlb_invalidate_asid(a) sh3_tlb_invalidate_asid(a)
! 102: #define sh_tlb_invalidate_all() sh3_tlb_invalidate_all()
! 103: #define sh_tlb_update(a, va, pte) sh3_tlb_update(a, va, pte)
! 104:
! 105: #elif defined(SH4)
! 106:
! 107: #define sh_mmu_start() sh4_mmu_start()
! 108: #define sh_tlb_invalidate_addr(a, va) sh4_tlb_invalidate_addr(a, va)
! 109: #define sh_tlb_invalidate_asid(a) sh4_tlb_invalidate_asid(a)
! 110: #define sh_tlb_invalidate_all() sh4_tlb_invalidate_all()
! 111: #define sh_tlb_update(a, va, pte) sh4_tlb_update(a, va, pte)
! 112:
! 113: #endif
! 114:
! 115: #endif /* !_SH_MMU_H_ */
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