![]() ![]() | ![]() |
File: [local] / sys / arch / sh / include / fpu.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:08:57 2008 UTC (16 years, 5 months ago) by nbrk
Import of OpenBSD 4.2 release kernel tree with initial code to support Jornada 720/728, StrongARM 1110-based handheld PC. At this point kernel roots on NFS and boots into vfs_mountroot() and traps. What is supported: - glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode (needs some palette tweaks for non black/white/blue colors, i think) - saic, SA11x0 interrupt controller (needs cleanup) - sacom, SA11x0 UART (supported only as boot console for now) - SA11x0 GPIO controller fully supported (but can't handle multiple interrupt handlers on one gpio pin) - sassp, SSP port on SA11x0 that attaches spibus - Jornada microcontroller (jmcu) to control kbd, battery, etc throught the SPI bus (wskbd attaches on jmcu, but not tested) - tod functions seem work - initial code for SA-1111 (chip companion) : this is TODO Next important steps, i think: - gpio and intc on sa1111 - pcmcia support for sa11x0 (and sa1111 help logic) - REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs) - root on wd0! (using already supported PCMCIA-ATA) |
#ifndef _SH_FPU_H_ /* $OpenBSD: fpu.h,v 1.1 2006/11/05 18:57:20 miod Exp $ */ /* * Copyright (c) 2006, Miodrag Vallat * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #define _SH_FPU_H_ /* * SH4{,a} FPU definitions */ /* FPSCR bits */ #define FPSCR_RB 0x00200000 /* register bank */ #define FPSCR_SZ 0x00100000 /* transfer size mode */ #define FPSCR_PR 0x00080000 /* precision mode */ #define FPSCR_DN 0x00040000 /* denormalization mode */ #define FPSCR_CAUSE_MASK 0x0003f000 /* exception cause mask */ #define FPSCR_CAUSE_SHIFT 12 #define FPSCR_ENABLE_MASK 0x00000f80 /* exception enable mask */ #define FPSCR_ENABLE_SHIFT 7 #define FPSCR_FLAG_MASK 0x0000007c /* exception sticky mask */ #define FPSCR_FLAG_SHIFT 2 #define FPSCR_ROUNDING_MASK 0x00000003 /* rounding mask */ /* FPSCR exception bits */ #define FPEXC_E 0x20 /* FPU Error */ #define FPEXC_V 0x10 /* invalid operation */ #define FPEXC_Z 0x08 /* divide by zero */ #define FPEXC_O 0x04 /* overflow */ #define FPEXC_U 0x02 /* underflow */ #define FPEXC_I 0x01 /* inexact */ #endif /* _SH_FPU_H_ */