Annotation of sys/arch/sgi/localbus/crimebus.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: crimebus.h,v 1.6 2007/06/21 20:17:12 miod Exp $ */
2:
3: /*
4: * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se).
5: *
6: * Redistribution and use in source and binary forms, with or without
7: * modification, are permitted provided that the following conditions
8: * are met:
9: * 1. Redistributions of source code must retain the above copyright
10: * notice, this list of conditions and the following disclaimer.
11: * 2. Redistributions in binary form must reproduce the above copyright
12: * notice, this list of conditions and the following disclaimer in the
13: * documentation and/or other materials provided with the distribution.
14: *
15: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
16: * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19: * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25: * SUCH DAMAGE.
26: *
27: */
28:
29: #ifndef _CRIMEBUS_H_
30: #define _CRIMEBUS_H_
31:
32: #include <machine/bus.h>
33:
34: #define CRIMEBUS_BASE 0x14000000
35:
36: #define CRIME_REVISION 0x0000
37:
38: #define CRIME_CONTROL 0x0008
39: #define CRIME_CTRL_TRITON_SYSADC 0x2000
40: #define CRIME_CTRL_CRIME_SYSADC 0x1000
41: #define CRIME_CTRL_HARD_RESET 0x0800
42: #define CRIME_CTRL_SOFT_RESET 0x0400
43: #define CRIME_CTRL_DOG_ENABLE 0x0200
44: #define CRIME_CTRL_ENDIAN_BIG 0x0100
45:
46: #define CRIME_INT_STAT 0x0010
47: #define CRIME_INT_MASK 0x0018
48: #define CRIME_INT_SOFT 0x0020
49: #define CRIME_INT_HARD 0x0028
50:
51: /*
52: * CRIME_INT_STAT and CRIME_INT_MASK mapping.
53: */
54: #define CRIME_INT_VIDEO_IN_1 0x00000001 /* Video in 1 */
55: #define CRIME_INT_VIDEO_IN_2 0x00000002 /* Video in 2 */
56: #define CRIME_INT_VIDEO_OUT 0x00000004 /* Video out */
57: #define CRIME_INT_MACE_ETHER 0x00000008 /* Mace ethernet NIC */
58: #define CRIME_INT_SUPER_IO 0x00000010 /* Super I/O sub interrupt */
59: #define CRIME_INT_SUB_MISC 0x00000020 /* Misc ??? */
60: #define CRIME_INT_SUB_AUDIO 0x00000040 /* Audio sub interrupt */
61: #define CRIME_INT_PCI_BRIDGE 0x00000080 /* PCI bridge errors */
62: #define CRIME_INT_PCI_SCSI_0 0x00000100 /* AIC SCSI controller 0 */
63: #define CRIME_INT_PCI_SCSI_1 0x00000200 /* AIC SCSI controller 1 */
64: #define CRIME_INT_PCI_SLOT_0 0x00000400 /* PCI expansion slot 0 */
65: #define CRIME_INT_PCI_SLOT_1 0x00000800 /* PCI expansion slot 1 */
66: #define CRIME_INT_PCI_SLOT_2 0x00001000 /* PCI expansion slot 2 */
67: #define CRIME_INT_PCI_SHARE_0 0x00002000 /* PCI shared 0 */
68: #define CRIME_INT_PCI_SHARE_1 0x00004000 /* PCI shared 1 */
69: #define CRIME_INT_PCI_SHARE_2 0x00008000 /* PCI shared 2 */
70: #define CRIME_INT_GBE_0 0x00010000 /* GBE0 (E) */
71: #define CRIME_INT_GBE_1 0x00020000 /* GBE1 (E) */
72: #define CRIME_INT_GBE_2 0x00040000 /* GBE2 (E) */
73: #define CRIME_INT_GBE_3 0x00080000 /* GBE3 (E) */
74: #define CRIME_INT_CPU_ERR 0x00100000 /* CPU Errors */
75: #define CRIME_INT_MEM_ERR 0x00200000 /* MEMORY Errors */
76: #define CRIME_INT_RE_EDGE_EMPTY 0x00400000 /* RE */
77: #define CRIME_INT_RE_EDGE_FULL 0x00800000 /* RE */
78: #define CRIME_INT_RE_EDGE_IDLE 0x01000000 /* RE */
79: #define CRIME_INT_RE_LEVL_EMPTY 0x02000000 /* RE */
80: #define CRIME_INT_RE_LEVL_FULL 0x04000000 /* RE */
81: #define CRIME_INT_RE_LEVL_IDLE 0x08000000 /* RE */
82: #define CRIME_INT_SOFT_0 0x10000000 /* ??? */
83: #define CRIME_INT_SOFT_1 0x20000000 /* ??? */
84: #define CRIME_INT_SOFT_2 0x40000000 /* ??? */
85: #define CRIME_INT_VICE 0x80000000 /* ??? */
86:
87:
88: /*
89: * Watchdog?
90: */
91: #define CRIME_KICK_DOG 0x0030
92: #define CRIME_TIMER 0x0038
93:
94: #define CRIME_CPU_ERROR_ADDR 0x0040
95: #define CRIME_CPU_ERROR_STAT 0x0048
96: #define CRIME_CPU_ERROR_ENAB 0x0050
97:
98: #define CRIME_MEM_BANK0_CONTROL 0x0208
99: #define CRIME_MEM_BANK_ADDR 0x01f
100: #define CRIME_MEM_BANK_128MB 0x100
101: #define CRIME_MAX_BANKS 8
102:
103: #define CRIME_MEMORY_OFFSET 0x40000000 /* 1GB */
104: #define CRIME_MEMORY_MASK 0x3fffffff
105:
106: #define CRIME_MEM_ERROR_STAT 0x0250
107: #define CRIME_MEM_ERROR_ADDR 0x0258
108:
109: extern bus_space_t crimebus_tag;
110:
111: u_int8_t crime_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
112: u_int16_t crime_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
113: u_int32_t crime_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
114: u_int64_t crime_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
115:
116: void crime_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int8_t);
117: void crime_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int16_t);
118: void crime_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int32_t);
119: void crime_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int64_t);
120:
121: int crime_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
122: void crime_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
123: int crime_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *);
124:
125: #endif /* _CRIMEBUS_H_ */
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