Annotation of sys/arch/sgi/include/intr.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: intr.h,v 1.18 2007/06/20 16:50:41 miod Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
! 5: *
! 6: * Redistribution and use in source and binary forms, with or without
! 7: * modification, are permitted provided that the following conditions
! 8: * are met:
! 9: * 1. Redistributions of source code must retain the above copyright
! 10: * notice, this list of conditions and the following disclaimer.
! 11: * 2. Redistributions in binary form must reproduce the above copyright
! 12: * notice, this list of conditions and the following disclaimer in the
! 13: * documentation and/or other materials provided with the distribution.
! 14: *
! 15: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
! 16: * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
! 17: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 18: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
! 19: * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 20: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 21: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 22: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 23: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 24: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 25: * SUCH DAMAGE.
! 26: *
! 27: */
! 28:
! 29: #ifndef _MACHINE_INTR_H_
! 30: #define _MACHINE_INTR_H_
! 31:
! 32: /*
! 33: * The interrupt mask cpl is a mask which can be used with the
! 34: * CPU interrupt mask register or an external HW mask register.
! 35: * If interrupts are masked by the CPU interrupt mask all external
! 36: * masks should be enabled and any routing set up so that the
! 37: * interrupt source is routed to the CPU interrupt corresponding
! 38: * to the interrupts "priority level". In this case the generic
! 39: * interrupt handler can be used.
! 40: *
! 41: * The IMASK_EXTERNAL define is used to select whether the CPU
! 42: * interrupt mask should be controlled by the cpl mask value
! 43: * or not. If the mask is external, the CPU mask is never changed
! 44: * from the value it gets when interrupt dispatchers are registred.
! 45: * When an external masking register is used dedicated interrupt
! 46: * handlers must be written as well as ipending handlers.
! 47: */
! 48: #define IMASK_EXTERNAL /* XXX move this to config */
! 49:
! 50: /* This define controls whether splraise is inlined or not */
! 51: /* #define INLINE_SPLRAISE */
! 52:
! 53:
! 54: /* Interrupt priority `levels'; not mutually exclusive. */
! 55: #define IPL_NONE 0 /* nothing */
! 56: #define IPL_BIO 1 /* block I/O */
! 57: #define IPL_AUDIO IPL_BIO
! 58: #define IPL_NET 2 /* network */
! 59: #define IPL_TTY 3 /* terminal */
! 60: #define IPL_VM 4 /* memory allocation */
! 61: #define IPL_CLOCK 5 /* clock */
! 62: #define IPL_HIGH 6 /* everything */
! 63: #define NIPLS 7 /* Number of levels */
! 64:
! 65: /* Interrupt sharing types. */
! 66: #define IST_NONE 0 /* none */
! 67: #define IST_PULSE 1 /* pulsed */
! 68: #define IST_EDGE 2 /* edge-triggered */
! 69: #define IST_LEVEL 3 /* level-triggered */
! 70:
! 71: /* Soft interrupt masks. */
! 72: #define SINT_CLOCK 31
! 73: #define SINT_CLOCKMASK (1 << SINT_CLOCK)
! 74: #define SINT_NET 30
! 75: #define SINT_NETMASK ((1 << SINT_NET) | SINT_CLOCKMASK)
! 76: #define SINT_TTY 29
! 77: #define SINT_TTYMASK ((1 << SINT_TTY) | SINT_CLOCKMASK)
! 78: #define SINT_ALLMASK (SINT_CLOCKMASK | SINT_NETMASK | SINT_TTYMASK)
! 79: #define SPL_CLOCK 28
! 80: #define SPL_CLOCKMASK (1 << SPL_CLOCK)
! 81:
! 82: #ifndef _LOCORE
! 83:
! 84: #define splbio() splraise(imask[IPL_BIO])
! 85: #define splnet() splraise(imask[IPL_NET])
! 86: #define spltty() splraise(imask[IPL_TTY])
! 87: #define splaudio() splraise(imask[IPL_AUDIO])
! 88: #define splclock() splraise(imask[IPL_CLOCK])
! 89: #define splvm() splraise(imask[IPL_VM])
! 90: #define splsoftclock() splraise(SINT_CLOCKMASK)
! 91: #define splsoftnet() splraise(SINT_NETMASK|SINT_CLOCKMASK)
! 92: #define splsofttty() splraise(SINT_TTYMASK)
! 93: #define splstatclock() splhigh()
! 94: #define splsched() splhigh()
! 95: #define splhigh() splraise(-1)
! 96: #define spl0() spllower(0)
! 97:
! 98: #include <machine/atomic.h>
! 99:
! 100: #define setsoftclock() atomic_setbits_int(&ipending, SINT_CLOCKMASK)
! 101: #define setsoftnet() atomic_setbits_int(&ipending, SINT_NETMASK)
! 102: #define setsofttty() atomic_setbits_int(&ipending, SINT_TTYMASK)
! 103:
! 104: void splinit(void);
! 105:
! 106: #define splassert(X)
! 107:
! 108: /*
! 109: * Schedule prioritys for base interrupts (cpu)
! 110: */
! 111: #define INTPRI_CLOCK 1
! 112: #define INTPRI_MACEIO 2 /* O2 I/O interrupt */
! 113: #define INTPRI_XBOWMUX 2 /* Origin 200/2000 I/O interrupt */
! 114: #define INTPRI_MACEAUX 3
! 115:
! 116: /*
! 117: * Define a type for interrupt masks. We may need 64 bits here.
! 118: */
! 119: typedef u_int32_t intrmask_t; /* Type of var holding interrupt mask */
! 120:
! 121: #define INTMASKSIZE (sizeof(intrmask_t) * 8)
! 122:
! 123: extern volatile intrmask_t cpl;
! 124: extern volatile intrmask_t ipending;
! 125: extern volatile intrmask_t astpending;
! 126:
! 127: extern intrmask_t imask[NIPLS];
! 128:
! 129: /*
! 130: * A note on clock interrupts. Clock interrupts are always
! 131: * allowed to happen but will not be serviced if masked.
! 132: * The reason for this is that clocks usually sits on INT5
! 133: * and can not be easily masked if external HW masking is used.
! 134: */
! 135:
! 136: /* Inlines */
! 137: static __inline void register_pending_int_handler(void (*)(int));
! 138: static __inline void splx(int newcpl);
! 139: static __inline int spllower(int newcpl);
! 140:
! 141: typedef void (int_f) (int);
! 142: extern int_f *pending_hand;
! 143:
! 144: static __inline void
! 145: register_pending_int_handler(void(*pending)(int))
! 146: {
! 147: pending_hand = pending;
! 148: }
! 149:
! 150: /*
! 151: */
! 152: #ifdef INLINE_SPLRAISE
! 153: static __inline int splraise(int newcpl);
! 154: static __inline int
! 155: splraise(int newcpl)
! 156: {
! 157: int oldcpl;
! 158:
! 159: __asm__ (" .set noreorder\n");
! 160: oldcpl = cpl;
! 161: cpl = oldcpl | newcpl;
! 162: __asm__ (" sync\n .set reorder\n");
! 163: return (oldcpl);
! 164: }
! 165: #else
! 166: int splraise(int newcpl);
! 167: #endif
! 168:
! 169: static __inline void
! 170: splx(int newcpl)
! 171: {
! 172: if (ipending & ~newcpl)
! 173: (*pending_hand)(newcpl);
! 174: else
! 175: cpl = newcpl;
! 176: }
! 177:
! 178: static __inline int
! 179: spllower(int newcpl)
! 180: {
! 181: int oldcpl;
! 182:
! 183: oldcpl = cpl;
! 184: if (ipending & ~newcpl)
! 185: (*pending_hand)(newcpl);
! 186: else
! 187: cpl = newcpl;
! 188: return (oldcpl);
! 189: }
! 190:
! 191: /*
! 192: * Interrupt control struct used by interrupt dispatchers
! 193: * to hold interrupt handler info.
! 194: */
! 195:
! 196: #include <sys/evcount.h>
! 197:
! 198: struct intrhand {
! 199: struct intrhand *ih_next;
! 200: int (*ih_fun)(void *);
! 201: void *ih_arg;
! 202: int ih_level;
! 203: int ih_irq;
! 204: char *ih_what;
! 205: void *frame;
! 206: struct evcount ih_count;
! 207: };
! 208:
! 209: extern struct intrhand *intrhand[INTMASKSIZE];
! 210:
! 211: /*
! 212: * Low level interrupt dispatcher registration data.
! 213: */
! 214: #define NLOWINT 16 /* Number of low level registrations possible */
! 215:
! 216: struct trap_frame;
! 217:
! 218: extern intrmask_t idle_mask;
! 219: extern int last_low_int;
! 220:
! 221: void set_intr(int, intrmask_t, intrmask_t(*)(intrmask_t, struct trap_frame *));
! 222:
! 223: #ifdef IMASK_EXTERNAL
! 224: void hw_setintrmask(intrmask_t);
! 225: extern void *hwmask_addr;
! 226: #endif
! 227:
! 228: /*
! 229: * Generic interrupt handling code that can be used for simple
! 230: * interrupt hardware models. Functions can also be used by
! 231: * more complex code especially the mask calculation code.
! 232: */
! 233:
! 234: void *generic_intr_establish(void *, u_long, int, int,
! 235: int (*)(void *), void *, char *);
! 236: void generic_intr_disestablish(void *, void *);
! 237: void generic_intr_makemasks(void);
! 238: void generic_do_pending_int(int);
! 239: intrmask_t generic_iointr(intrmask_t, struct trap_frame *);
! 240:
! 241: #endif /* _LOCORE */
! 242:
! 243: #endif /* _MACHINE_INTR_H_ */
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