Annotation of sys/arch/sgi/include/bus.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: bus.h,v 1.6 2007/06/21 20:17:12 miod Exp $ */
2:
3: /*
4: * Copyright (c) 2003-2004 Opsycon AB Sweden. All rights reserved.
5: *
6: * Redistribution and use in source and binary forms, with or without
7: * modification, are permitted provided that the following conditions
8: * are met:
9: * 1. Redistributions of source code must retain the above copyright
10: * notice, this list of conditions and the following disclaimer.
11: * 2. Redistributions in binary form must reproduce the above copyright
12: * notice, this list of conditions and the following disclaimer in the
13: * documentation and/or other materials provided with the distribution.
14: *
15: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25: */
26:
27: #ifndef _MACHINE_BUS_H_
28: #define _MACHINE_BUS_H_
29:
30: #include <machine/pio.h>
31:
32: #ifdef __STDC__
33: #define CAT(a,b) a##b
34: #define CAT3(a,b,c) a##b##c
35: #else
36: #define CAT(a,b) a/**/b
37: #define CAT3(a,b,c) a/**/b/**/c
38: #endif
39:
40: /*
41: * Bus access types.
42: */
43: struct mips_bus_space;
44: typedef u_long bus_addr_t;
45: typedef u_long bus_size_t;
46: typedef u_long bus_space_handle_t;
47: typedef struct mips_bus_space *bus_space_tag_t;
48: typedef struct mips_bus_space bus_space_t;
49:
50: struct mips_bus_space {
51: struct extent *bus_extent;
52: bus_addr_t bus_base;
53: bus_addr_t bus_base_dma;
54: int32_t bus_reverse;
55: u_int8_t (*_space_read_1)(bus_space_tag_t , bus_space_handle_t,
56: bus_size_t);
57: void (*_space_write_1)(bus_space_tag_t , bus_space_handle_t,
58: bus_size_t, u_int8_t);
59: u_int16_t (*_space_read_2)(bus_space_tag_t , bus_space_handle_t,
60: bus_size_t);
61: void (*_space_write_2)(bus_space_tag_t , bus_space_handle_t,
62: bus_size_t, u_int16_t);
63: u_int32_t (*_space_read_4)(bus_space_tag_t , bus_space_handle_t,
64: bus_size_t);
65: void (*_space_write_4)(bus_space_tag_t , bus_space_handle_t,
66: bus_size_t, u_int32_t);
67: u_int64_t (*_space_read_8)(bus_space_tag_t , bus_space_handle_t,
68: bus_size_t);
69: void (*_space_write_8)(bus_space_tag_t , bus_space_handle_t,
70: bus_size_t, u_int64_t);
71: int (*_space_map)(bus_space_tag_t , bus_addr_t,
72: bus_size_t, int, bus_space_handle_t *);
73: void (*_space_unmap)(bus_space_tag_t, bus_space_handle_t,
74: bus_size_t);
75: int (*_space_subregion)(bus_space_tag_t, bus_space_handle_t,
76: bus_size_t, bus_size_t, bus_space_handle_t *);
77: };
78:
79: #define bus_space_read_1(t, h, o) (*(t)->_space_read_1)((t), (h), (o))
80: #define bus_space_read_2(t, h, o) (*(t)->_space_read_2)((t), (h), (o))
81: #define bus_space_read_4(t, h, o) (*(t)->_space_read_4)((t), (h), (o))
82: #define bus_space_read_8(t, h, o) (*(t)->_space_read_8)((t), (h), (o))
83:
84: #define bus_space_write_1(t, h, o, v) (*(t)->_space_write_1)((t), (h), (o), (v))
85: #define bus_space_write_2(t, h, o, v) (*(t)->_space_write_2)((t), (h), (o), (v))
86: #define bus_space_write_4(t, h, o, v) (*(t)->_space_write_4)((t), (h), (o), (v))
87: #define bus_space_write_8(t, h, o, v) (*(t)->_space_write_8)((t), (h), (o), (v))
88:
89: #define bus_space_map(t, o, s, c, p) (*(t)->_space_map)((t), (o), (s), (c), (p))
90: #define bus_space_unmap(t, h, s) (*(t)->_space_unmap)((t), (h), (s))
91: #define bus_space_subregion(t, h, o, s, p) \
92: (*(t)->_space_subregion)((t), (h), (o), (s), (p))
93:
94: /* Helper function in pmap.c */
95: int bus_mem_add_mapping(bus_addr_t, bus_size_t, int, bus_space_handle_t *);
96:
97:
98: /*----------------------------------------------------------------------------*/
99: #define bus_space_read_multi(n,m) \
100: static __inline void \
101: CAT(bus_space_read_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
102: bus_size_t o, CAT3(u_int,m,_t) *x, size_t cnt) \
103: { \
104: while (cnt--) \
105: *x++ = CAT(bus_space_read_,n)(bst, bsh, o); \
106: }
107:
108: bus_space_read_multi(1,8)
109: bus_space_read_multi(2,16)
110: bus_space_read_multi(4,32)
111:
112: #define bus_space_read_multi_8 !!! bus_space_read_multi_8 not implemented !!!
113:
114: /*----------------------------------------------------------------------------*/
115: #define bus_space_read_region(n,m) \
116: static __inline void \
117: CAT(bus_space_read_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
118: bus_addr_t ba, CAT3(u_int,m,_t) *x, size_t cnt) \
119: { \
120: while (cnt--) \
121: *x++ = CAT(bus_space_read_,n)(bst, bsh, ba++); \
122: }
123:
124: bus_space_read_region(1,8)
125: bus_space_read_region(2,16)
126: bus_space_read_region(4,32)
127:
128: #define bus_space_read_region_8 !!! bus_space_read_region_8 not implemented !!!
129:
130: /*----------------------------------------------------------------------------*/
131: #define bus_space_write_multi(n,m) \
132: static __inline void \
133: CAT(bus_space_write_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
134: bus_size_t o, const CAT3(u_int,m,_t) *x, size_t cnt) \
135: { \
136: while (cnt--) { \
137: CAT(bus_space_write_,n)(bst, bsh, o, *x++); \
138: } \
139: }
140:
141: bus_space_write_multi(1,8)
142: bus_space_write_multi(2,16)
143: bus_space_write_multi(4,32)
144:
145: #define bus_space_write_multi_8 !!! bus_space_write_multi_8 not implemented !!!
146:
147: /*----------------------------------------------------------------------------*/
148: #define bus_space_write_region(n,m) \
149: static __inline void \
150: CAT(bus_space_write_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
151: bus_addr_t ba, const CAT3(u_int,m,_t) *x, size_t cnt) \
152: { \
153: while (cnt--) { \
154: CAT(bus_space_write_,n)(bst, bsh, ba, *x++); \
155: ba += sizeof(x); \
156: } \
157: }
158:
159: bus_space_write_region(1,8)
160: bus_space_write_region(2,16)
161: bus_space_write_region(4,32)
162:
163: #define bus_space_write_region_8 \
164: !!! bus_space_write_region_8 not implemented !!!
165:
166: /*----------------------------------------------------------------------------*/
167: #define bus_space_set_region(n,m) \
168: static __inline void \
169: CAT(bus_space_set_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
170: bus_addr_t ba, CAT3(u_int,m,_t) x, size_t cnt) \
171: { \
172: while (cnt--) { \
173: CAT(bus_space_write_,n)(bst, bsh, ba, x); \
174: ba += sizeof(x); \
175: } \
176: }
177:
178: bus_space_set_region(1,8)
179: bus_space_set_region(2,16)
180: bus_space_set_region(4,32)
181:
182: /*----------------------------------------------------------------------------*/
183: #define bus_space_read_raw_multi(n,m,l) \
184: static __inline void \
185: CAT(bus_space_read_raw_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
186: bus_addr_t ba, u_int8_t *buf, bus_size_t cnt) \
187: { \
188: CAT(bus_space_read_multi_,n)(bst, bsh, ba, (CAT3(u_int,m,_t) *)buf, \
189: cnt >> l); \
190: }
191:
192: bus_space_read_raw_multi(2,16,1)
193: bus_space_read_raw_multi(4,32,2)
194:
195: #define bus_space_read_raw_multi_8 \
196: !!! bus_space_read_raw_multi_8 not implemented !!!
197:
198: /*----------------------------------------------------------------------------*/
199: #define bus_space_write_raw_multi(n,m,l) \
200: static __inline void \
201: CAT(bus_space_write_raw_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,\
202: bus_addr_t ba, const u_int8_t *buf, bus_size_t cnt) \
203: { \
204: CAT(bus_space_write_multi_,n)(bst, bsh, ba, \
205: (const CAT3(u_int,m,_t) *)buf, cnt >> l); \
206: }
207:
208: bus_space_write_raw_multi(2,16,1)
209: bus_space_write_raw_multi(4,32,2)
210:
211: #define bus_space_write_raw_multi_8 \
212: !!! bus_space_write_raw_multi_8 not implemented !!!
213:
214: /*----------------------------------------------------------------------------*/
215: static __inline void
216: bus_space_copy_1(void *v, bus_space_handle_t h1, bus_size_t o1,
217: bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
218: {
219: char *s = (char *)(h1 + o1);
220: char *d = (char *)(h2 + o2);
221:
222: while (c--)
223: *d++ = *s++;
224: }
225:
226:
227: static __inline void
228: bus_space_copy_2(void *v, bus_space_handle_t h1, bus_size_t o1,
229: bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
230: {
231: short *s = (short *)(h1 + o1);
232: short *d = (short *)(h2 + o2);
233:
234: while (c--)
235: *d++ = *s++;
236: }
237:
238: static __inline void
239: bus_space_copy_4(void *v, bus_space_handle_t h1, bus_size_t o1,
240: bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
241: {
242: int *s = (int *)(h1 + o1);
243: int *d = (int *)(h2 + o2);
244:
245: while (c--)
246: *d++ = *s++;
247: }
248:
249: #define bus_space_copy_8 \
250: !!! bus_space_write_raw_multi_8 not implemented !!!
251:
252: /*----------------------------------------------------------------------------*/
253: /*
254: * Bus read/write barrier methods.
255: *
256: * void bus_space_barrier(bus_space_tag_t tag,
257: * bus_space_handle_t bsh, bus_size_t offset,
258: * bus_size_t len, int flags);
259: *
260: */
261: #define bus_space_barrier(t, h, o, l, f) \
262: ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
263: #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
264: #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
265: /* Compatibility defines */
266: #define BUS_BARRIER_READ BUS_SPACE_BARRIER_READ
267: #define BUS_BARRIER_WRITE BUS_SPACE_BARRIER_WRITE
268:
269:
270: #define BUS_DMA_WAITOK 0x00
271: #define BUS_DMA_NOWAIT 0x01
272: #define BUS_DMA_ALLOCNOW 0x02
273: #define BUS_DMAMEM_NOSYNC 0x04
274: #define BUS_DMA_COHERENT 0x08
275: #define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
276: #define BUS_DMA_BUS2 0x20
277: #define BUS_DMA_BUS3 0x40
278: #define BUS_DMA_BUS4 0x80
279: #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
280: #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
281: #define BUS_DMA_STREAMING 0x400 /* hint: sequential, unidirectional */
282:
283: /* Forwards needed by prototypes below. */
284: struct mbuf;
285: struct proc;
286: struct uio;
287:
288: #define BUS_DMASYNC_POSTREAD 0x0001
289: #define BUS_DMASYNC_POSTWRITE 0x0002
290: #define BUS_DMASYNC_PREREAD 0x0004
291: #define BUS_DMASYNC_PREWRITE 0x0008
292:
293: typedef struct machine_bus_dma_tag *bus_dma_tag_t;
294: typedef struct machine_bus_dmamap *bus_dmamap_t;
295:
296: /*
297: * bus_dma_segment_t
298: *
299: * Describes a single contiguous DMA transaction. Values
300: * are suitable for programming into DMA registers.
301: */
302: struct machine_bus_dma_segment {
303: bus_addr_t ds_addr; /* DMA address */
304: bus_addr_t ds_vaddr; /* CPU address */
305: bus_size_t ds_len; /* length of transfer */
306: };
307: typedef struct machine_bus_dma_segment bus_dma_segment_t;
308:
309: /*
310: * bus_dma_tag_t
311: *
312: * A machine-dependent opaque type describing the implementation of
313: * DMA for a given bus.
314: */
315:
316: struct machine_bus_dma_tag {
317: void *_cookie; /* cookie used in the guts */
318:
319: /*
320: * DMA mapping methods.
321: */
322: int (*_dmamap_create)(bus_dma_tag_t , bus_size_t, int,
323: bus_size_t, bus_size_t, int, bus_dmamap_t *);
324: void (*_dmamap_destroy)(bus_dma_tag_t , bus_dmamap_t);
325: int (*_dmamap_load)(bus_dma_tag_t , bus_dmamap_t, void *,
326: bus_size_t, struct proc *, int);
327: int (*_dmamap_load_mbuf)(bus_dma_tag_t , bus_dmamap_t,
328: struct mbuf *, int);
329: int (*_dmamap_load_uio)(bus_dma_tag_t , bus_dmamap_t,
330: struct uio *, int);
331: int (*_dmamap_load_raw)(bus_dma_tag_t , bus_dmamap_t,
332: bus_dma_segment_t *, int, bus_size_t, int);
333: void (*_dmamap_unload)(bus_dma_tag_t , bus_dmamap_t);
334: void (*_dmamap_sync)(bus_dma_tag_t , bus_dmamap_t,
335: bus_addr_t, bus_size_t, int);
336:
337: /*
338: * DMA memory utility functions.
339: */
340: int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
341: bus_size_t, bus_dma_segment_t *, int, int *, int);
342: void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int);
343: int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
344: int, size_t, caddr_t *, int);
345: void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
346: paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
347: int, off_t, int, int);
348:
349: /*
350: * internal memory address translation information.
351: */
352: bus_addr_t (*_pa_to_device)(paddr_t);
353: paddr_t (*_device_to_pa)(bus_addr_t);
354: bus_addr_t _dma_mask;
355: };
356:
357: #define bus_dmamap_create(t, s, n, m, b, f, p) \
358: (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
359: #define bus_dmamap_destroy(t, p) \
360: (*(t)->_dmamap_destroy)((t), (p))
361: #define bus_dmamap_load(t, m, b, s, p, f) \
362: (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
363: #define bus_dmamap_load_mbuf(t, m, b, f) \
364: (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
365: #define bus_dmamap_load_uio(t, m, u, f) \
366: (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
367: #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
368: (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
369: #define bus_dmamap_unload(t, p) \
370: (*(t)->_dmamap_unload)((t), (p))
371: #define bus_dmamap_sync(t, p, a, l, o) \
372: (void)((t)->_dmamap_sync ? \
373: (*(t)->_dmamap_sync)((t), (p), (a), (l), (o)) : (void)0)
374:
375: #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
376: (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
377: #define bus_dmamem_free(t, sg, n) \
378: (*(t)->_dmamem_free)((t), (sg), (n))
379: #define bus_dmamem_map(t, sg, n, s, k, f) \
380: (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
381: #define bus_dmamem_unmap(t, k, s) \
382: (*(t)->_dmamem_unmap)((t), (k), (s))
383: #define bus_dmamem_mmap(t, sg, n, o, p, f) \
384: (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
385:
386: int _dmamap_create(bus_dma_tag_t, bus_size_t, int,
387: bus_size_t, bus_size_t, int, bus_dmamap_t *);
388: void _dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
389: int _dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
390: bus_size_t, struct proc *, int);
391: int _dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int);
392: int _dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
393: int _dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
394: bus_dma_segment_t *, int, bus_size_t, int);
395: void _dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
396: void _dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
397: bus_size_t, int);
398:
399: int _dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
400: bus_size_t, bus_dma_segment_t *, int, int *, int);
401: void _dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
402: int _dmamem_map(bus_dma_tag_t, bus_dma_segment_t *,
403: int, size_t, caddr_t *, int);
404: void _dmamem_unmap(bus_dma_tag_t, caddr_t, size_t);
405: paddr_t _dmamem_mmap(bus_dma_tag_t, bus_dma_segment_t *, int, off_t, int, int);
406: int _dmamem_alloc_range(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t,
407: bus_dma_segment_t *, int, int *, int, vaddr_t, vaddr_t);
408:
409: /*
410: * bus_dmamap_t
411: *
412: * Describes a DMA mapping.
413: */
414: struct machine_bus_dmamap {
415: /*
416: * PRIVATE MEMBERS: not for use by machine-independent code.
417: */
418: bus_size_t _dm_size; /* largest DMA transfer mappable */
419: int _dm_segcnt; /* number of segs this map can map */
420: bus_size_t _dm_maxsegsz; /* largest possible segment */
421: bus_size_t _dm_boundary; /* don't cross this */
422: int _dm_flags; /* misc. flags */
423:
424: void *_dm_cookie; /* cookie for bus-specific functions */
425:
426: /*
427: * PUBLIC MEMBERS: these are used by machine-independent code.
428: */
429: bus_size_t dm_mapsize; /* size of the mapping */
430: int dm_nsegs; /* # valid segments in mapping */
431: bus_dma_segment_t dm_segs[1]; /* segments; variable length */
432: };
433:
434: #endif /* _MACHINE_BUS_H_ */
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