File: [local] / sys / arch / powerpc / powerpc / cpu_subr.c (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:07:48 2008 UTC (16 years, 3 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
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/* $OpenBSD: cpu_subr.c,v 1.2 2005/11/26 22:40:31 kettenis Exp $ */
/*
* Copyright (c) 2005 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <machine/cpu.h>
void
ppc_mtscomc(u_int32_t val)
{
int s;
s = ppc_intr_disable();
__asm __volatile ("mtspr 276,%0; isync" :: "r" (val));
ppc_intr_enable(s);
}
void
ppc_mtscomd(u_int32_t val)
{
int s;
s = ppc_intr_disable();
__asm __volatile ("mtspr 277,%0; isync" :: "r" (val));
ppc_intr_enable(s);
}
u_int64_t
ppc64_mfscomc(void)
{
u_int64_t ret;
int s;
s = ppc_intr_disable();
__asm __volatile ("mfspr %0,276;"
" mr %0+1, %0; srdi %0,%0,32" : "=r" (ret));
ppc_intr_enable(s);
return ret;
}
void
ppc64_mtscomc(u_int64_t val)
{
int s;
s = ppc_intr_disable();
__asm __volatile ("sldi %0,%0,32; or %0,%0,%0+1;"
" mtspr 276,%0; isync" :: "r" (val));
ppc_intr_enable(s);
}
u_int64_t
ppc64_mfscomd(void)
{
u_int64_t ret;
int s;
s = ppc_intr_disable();
__asm __volatile ("mfspr %0,277;"
" mr %0+1, %0; srdi %0,%0,32" : "=r" (ret));
ppc_intr_enable(s);
return ret;
}