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Annotation of sys/arch/powerpc/powerpc/cpu_subr.c, Revision 1.1

1.1     ! nbrk        1: /*     $OpenBSD: cpu_subr.c,v 1.2 2005/11/26 22:40:31 kettenis Exp $   */
        !             2:
        !             3: /*
        !             4:  * Copyright (c) 2005 Mark Kettenis
        !             5:  *
        !             6:  * Permission to use, copy, modify, and distribute this software for any
        !             7:  * purpose with or without fee is hereby granted, provided that the above
        !             8:  * copyright notice and this permission notice appear in all copies.
        !             9:  *
        !            10:  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
        !            11:  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
        !            12:  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
        !            13:  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
        !            14:  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
        !            15:  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
        !            16:  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
        !            17:  */
        !            18:
        !            19: #include <sys/param.h>
        !            20:
        !            21: #include <machine/cpu.h>
        !            22:
        !            23: void
        !            24: ppc_mtscomc(u_int32_t val)
        !            25: {
        !            26:        int s;
        !            27:
        !            28:        s = ppc_intr_disable();
        !            29:        __asm __volatile ("mtspr 276,%0; isync" :: "r" (val));
        !            30:        ppc_intr_enable(s);
        !            31: }
        !            32:
        !            33: void
        !            34: ppc_mtscomd(u_int32_t val)
        !            35: {
        !            36:        int s;
        !            37:
        !            38:        s = ppc_intr_disable();
        !            39:        __asm __volatile ("mtspr 277,%0; isync" :: "r" (val));
        !            40:        ppc_intr_enable(s);
        !            41: }
        !            42:
        !            43: u_int64_t
        !            44: ppc64_mfscomc(void)
        !            45: {
        !            46:        u_int64_t ret;
        !            47:        int s;
        !            48:
        !            49:        s = ppc_intr_disable();
        !            50:        __asm __volatile ("mfspr %0,276;"
        !            51:            " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret));
        !            52:        ppc_intr_enable(s);
        !            53:        return ret;
        !            54: }
        !            55:
        !            56: void
        !            57: ppc64_mtscomc(u_int64_t val)
        !            58: {
        !            59:        int s;
        !            60:
        !            61:        s = ppc_intr_disable();
        !            62:        __asm __volatile ("sldi %0,%0,32; or %0,%0,%0+1;"
        !            63:            " mtspr 276,%0; isync" :: "r" (val));
        !            64:        ppc_intr_enable(s);
        !            65: }
        !            66:
        !            67: u_int64_t
        !            68: ppc64_mfscomd(void)
        !            69: {
        !            70:        u_int64_t ret;
        !            71:        int s;
        !            72:
        !            73:        s = ppc_intr_disable();
        !            74:        __asm __volatile ("mfspr %0,277;"
        !            75:             " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret));
        !            76:        ppc_intr_enable(s);
        !            77:        return ret;
        !            78: }