Annotation of sys/arch/powerpc/isa/isa_machdep.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: isa_machdep.h,v 1.8 2003/10/31 03:55:06 drahn Exp $ */
2:
3: /*
4: * Copyright (c) 1997 Per Fogelstrom
5: *
6: * Redistribution and use in source and binary forms, with or without
7: * modification, are permitted provided that the following conditions
8: * are met:
9: * 1. Redistributions of source code must retain the above copyright
10: * notice, this list of conditions and the following disclaimer.
11: * 2. Redistributions in binary form must reproduce the above copyright
12: * notice, this list of conditions and the following disclaimer in the
13: * documentation and/or other materials provided with the distribution.
14: * 3. All advertising materials mentioning features or use of this software
15: * must display the following acknowledgement:
16: * This product includes software developed under OpenBSD by
17: * Per Fogelstrom, Opsycon AB, Sweden.
18: * 4. The name of the author may not be used to endorse or promote products
19: * derived from this software without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
22: * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
25: * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31: * SUCH DAMAGE.
32: *
33: */
34: #ifndef _ISA_MACHDEP_H_
35: #define _ISA_MACHDEP_H_
36:
37: typedef struct ppc_isa_bus *isa_chipset_tag_t;
38:
39: /*
40: * I/O macros to access isa bus ports/memory.
41: * At the first glance theese macros may seem inefficient.
42: * However, the cpu executes an instruction every <10 ns
43: * so the bus is much slower so it doesn't matter, really.
44: */
45: extern bus_space_handle_t ppc_isa_io_vaddr;
46: #define isa_outb(x,y) outb(ppc_isa_io_vaddr + (x), (y))
47: #define isa_inb(x) inb(ppc_isa_io_vaddr + (x))
48:
49: struct ppc_isa_bus {
50: void *ic_data;
51:
52: void (*ic_attach_hook) (struct device *, struct device *,
53: struct isabus_attach_args *);
54: void *(*ic_intr_establish) (void *, int, int, int,
55: int (*)(void *), void *, char *);
56: void (*ic_intr_disestablish) (void *, void *);
57: };
58:
59:
60: /*
61: * Functions provided to machine-independent ISA code.
62: */
63: #define isa_attach_hook(p, s, a) /* \
64: (*(a)->iba_ic->ic_attach_hook)((p), (s), (a)) */
65: #define isa_intr_establish(c, i, t, l, f, a, w) \
66: (*(c)->ic_intr_establish)((c)->ic_data, (i), (t), (l), (f), (a), (w))
67: #define isa_intr_disestablish(c, h) \
68: (*(c)->ic_intr_disestablish)((c)->ic_data, (h))
69:
70: #define __NO_ISA_INTR_CHECK /* FIXME */
71:
72: #define ICU_LEN 16 /* Number of possible interrupt sources */
73:
74: extern void * isabr_intr_establish(void *, int, int, int, int (*ih_fun) (void *), void *, char *);
75: #endif /* _ISA_MACHDEP_H_ */
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