Annotation of sys/arch/powerpc/include/pmap.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: pmap.h,v 1.44 2007/05/27 15:46:02 drahn Exp $ */
2: /* $NetBSD: pmap.h,v 1.1 1996/09/30 16:34:29 ws Exp $ */
3:
4: /*-
5: * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6: * Copyright (C) 1995, 1996 TooLs GmbH.
7: * All rights reserved.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. All advertising materials mentioning features or use of this software
18: * must display the following acknowledgement:
19: * This product includes software developed by TooLs GmbH.
20: * 4. The name of TooLs GmbH may not be used to endorse or promote products
21: * derived from this software without specific prior written permission.
22: *
23: * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26: * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27: * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28: * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29: * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30: * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31: * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32: * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33: */
34:
35: #ifndef _POWERPC_PMAP_H_
36: #define _POWERPC_PMAP_H_
37:
38: #include <machine/pte.h>
39:
40: /*
41: * Segment registers
42: */
43: #ifndef _LOCORE
44: typedef u_int sr_t;
45: #endif /* _LOCORE */
46: #define SR_TYPE 0x80000000
47: #define SR_SUKEY 0x40000000
48: #define SR_PRKEY 0x20000000
49: #define SR_NOEXEC 0x10000000
50: #define SR_VSID 0x00ffffff
51: /*
52: * bit
53: * 3 2 2 2 2 1 1 1 1 1 0
54: * 1 8 7 4 0 9 6 5 2 1 0
55: * |XXXX|XXXX XXXX|XXXX XXXX|XXXX XXXX XXXX
56: *
57: * bits 28 - 31 contain SR
58: * bits 20 - 27 contain L1 for VtoP translation
59: * bits 12 - 19 contain L2 for VtoP translation
60: * bits 0 - 11 contain page offset
61: */
62: #ifndef _LOCORE
63: /* V->P mapping data */
64: #define VP_SR_SIZE 16
65: #define VP_SR_MASK (VP_SR_SIZE-1)
66: #define VP_SR_POS 28
67: #define VP_IDX1_SIZE 256
68: #define VP_IDX1_MASK (VP_IDX1_SIZE-1)
69: #define VP_IDX1_POS 20
70: #define VP_IDX2_SIZE 256
71: #define VP_IDX2_MASK (VP_IDX2_SIZE-1)
72: #define VP_IDX2_POS 12
73:
74: /* functions used by the bus layer for device accesses */
75: void pmap_kenter_cache(vaddr_t va, paddr_t pa, vm_prot_t prot, int cacheable);
76: void pmap_kremove_pg(vaddr_t va);
77:
78: /* cache flags */
79: #define PMAP_CACHE_DEFAULT 0 /* WB cache managed mem, devices not */
80: #define PMAP_CACHE_CI 1 /* cache inhibit */
81: #define PMAP_CACHE_WT 2 /* writethru */
82: #define PMAP_CACHE_WB 3 /* writeback */
83:
84: #ifdef _KERNEL
85:
86: /*
87: * Pmap stuff
88: */
89: struct pmap {
90: sr_t pm_sr[16]; /* segments used in this pmap */
91: struct pmapvp *pm_vp[VP_SR_SIZE]; /* virtual to physical table */
92: u_int32_t pm_exec[16]; /* segments used in this pmap */
93: int pm_refs; /* ref count */
94: struct pmap_statistics pm_stats; /* pmap statistics */
95: };
96:
97: typedef struct pmap *pmap_t;
98:
99: extern struct pmap kernel_pmap_;
100: #define pmap_kernel() (&kernel_pmap_)
101: boolean_t pteclrbits(struct vm_page *pg, u_int mask, u_int clear);
102:
103:
104: #define pmap_clear_modify(page) \
105: (pteclrbits((page), PG_PMAP_MOD, TRUE))
106: #define pmap_clear_reference(page) \
107: (pteclrbits((page), PG_PMAP_REF, TRUE))
108: #define pmap_is_modified(page) \
109: (pteclrbits((page), PG_PMAP_MOD, FALSE))
110: #define pmap_is_referenced(page) \
111: (pteclrbits((page), PG_PMAP_REF, FALSE))
112:
113: #define pmap_unwire(pm, va)
114: #define pmap_phys_address(x) (x)
115: #define pmap_update(pmap) /* nothing (yet) */
116:
117: #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
118:
119: /*
120: * Alternate mapping methods for pool.
121: * Really simple. 0x0->0x80000000 contain 1->1 mappings of the physical
122: * memory. - XXX
123: */
124: #define pmap_map_direct(pg) ((vaddr_t)VM_PAGE_TO_PHYS(pg))
125: #define pmap_unmap_direct(va) PHYS_TO_VM_PAGE((paddr_t)va)
126: #define __HAVE_PMAP_DIRECT
127:
128: void pmap_bootstrap(u_int kernelstart, u_int kernelend);
129:
130: void pmap_pinit(struct pmap *);
131: void pmap_release(struct pmap *);
132:
133: void pmap_real_memory(vaddr_t *start, vsize_t *size);
134: void switchexit(struct proc *);
135:
136: int pte_spill_v(struct pmap *pm, u_int32_t va, u_int32_t dsisr, int exec_fault);
137: #define pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr) ;
138: int reserve_dumppages(caddr_t p);
139:
140: void pmap_proc_iflush(struct proc *proc, vaddr_t va, vsize_t len);
141: #define pmap_unuse_final(p) /* nothing */
142:
143: #define PMAP_STEAL_MEMORY
144:
145: #define PG_PMAP_MOD PG_PMAP0
146: #define PG_PMAP_REF PG_PMAP1
147: #define PG_PMAP_EXE PG_PMAP2
148:
149: #endif /* _KERNEL */
150: #endif /* _LOCORE */
151: #endif /* _POWERPC_PMAP_H_ */
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