Annotation of sys/arch/powerpc/include/lock.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: lock.h,v 1.1 2007/03/20 20:59:53 kettenis Exp $ */
2: /* $NetBSD: lock.h,v 1.8 2005/12/28 19:09:29 perry Exp $ */
3:
4: /*-
5: * Copyright (c) 2000 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
39:
40: /*
41: * Machine-dependent spin lock operations.
42: */
43:
44: #ifndef _POWERPC_LOCK_H_
45: #define _POWERPC_LOCK_H_
46:
47: typedef __volatile int __cpu_simple_lock_t;
48:
49: #define __SIMPLELOCK_LOCKED 1
50: #define __SIMPLELOCK_UNLOCKED 0
51:
52: static __inline void
53: __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
54: {
55: *alp = __SIMPLELOCK_UNLOCKED;
56: __asm volatile ("sync");
57: }
58:
59: static __inline void
60: __cpu_simple_lock(__cpu_simple_lock_t *alp)
61: {
62: int old;
63:
64: __asm volatile (" \
65: \n\
66: 1: lwarx %0,0,%1 \n\
67: cmpwi %0,%2 \n\
68: beq+ 3f \n\
69: 2: lwzx %0,0,%1 \n\
70: cmpwi %0,%2 \n\
71: beq+ 1b \n\
72: b 2b \n\
73: 3: stwcx. %3,0,%1 \n\
74: bne- 1b \n\
75: isync \n\
76: \n"
77: : "=&r"(old)
78: : "r"(alp), "I"(__SIMPLELOCK_UNLOCKED), "r"(__SIMPLELOCK_LOCKED)
79: : "memory");
80: }
81:
82: static __inline int
83: __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
84: {
85: int old, dummy;
86:
87: __asm volatile (" \
88: \n\
89: 1: lwarx %0,0,%1 \n\
90: cmpwi %0,%2 \n\
91: bne 2f \n\
92: stwcx. %3,0,%1 \n\
93: bne- 1b \n\
94: 2: stwcx. %3,0,%4 \n\
95: isync \n\
96: \n"
97: : "=&r"(old)
98: : "r"(alp), "I"(__SIMPLELOCK_UNLOCKED), "r"(__SIMPLELOCK_LOCKED),
99: "r"(&dummy)
100: : "memory");
101:
102: return (old == __SIMPLELOCK_UNLOCKED);
103: }
104:
105: static __inline void
106: __cpu_simple_unlock(__cpu_simple_lock_t *alp)
107: {
108: __asm volatile ("sync");
109: *alp = __SIMPLELOCK_UNLOCKED;
110: }
111:
112: #endif /* _POWERPC_LOCK_H_ */
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