Annotation of sys/arch/powerpc/include/intr.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: intr.h,v 1.33 2007/05/19 10:20:57 miod Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
! 5: *
! 6: * Redistribution and use in source and binary forms, with or without
! 7: * modification, are permitted provided that the following conditions
! 8: * are met:
! 9: * 1. Redistributions of source code must retain the above copyright
! 10: * notice, this list of conditions and the following disclaimer.
! 11: * 2. Redistributions in binary form must reproduce the above copyright
! 12: * notice, this list of conditions and the following disclaimer in the
! 13: * documentation and/or other materials provided with the distribution.
! 14: * 3. All advertising materials mentioning features or use of this software
! 15: * must display the following acknowledgement:
! 16: * This product includes software developed under OpenBSD by
! 17: * Per Fogelstrom, Opsycon AB, Sweden for RTMX Inc, North Carolina USA.
! 18: * 4. The name of the author may not be used to endorse or promote products
! 19: * derived from this software without specific prior written permission.
! 20: *
! 21: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
! 22: * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
! 23: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 24: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
! 25: * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 31: * SUCH DAMAGE.
! 32: *
! 33: */
! 34:
! 35: #ifndef _POWERPC_INTR_H_
! 36: #define _POWERPC_INTR_H_
! 37:
! 38: #define IPL_NONE 0
! 39: #define IPL_BIO 1
! 40: #define IPL_AUDIO IPL_BIO /* XXX - was defined this val in audio_if.h */
! 41: #define IPL_NET 2
! 42: #define IPL_TTY 3
! 43: #define IPL_VM 4
! 44: #define IPL_CLOCK 5
! 45: #define IPL_HIGH 6
! 46: #define IPL_NUM 7
! 47:
! 48: #define IST_NONE 0
! 49: #define IST_PULSE 1
! 50: #define IST_EDGE 2
! 51: #define IST_LEVEL 3
! 52:
! 53: #if defined(_KERNEL) && !defined(_LOCORE)
! 54:
! 55: #include <sys/evcount.h>
! 56: #include <machine/atomic.h>
! 57:
! 58: #define PPC_NIRQ 66
! 59: #define PPC_CLK_IRQ 64
! 60: #define PPC_STAT_IRQ 65
! 61:
! 62: void setsoftclock(void);
! 63: void clearsoftclock(void);
! 64: int splsoftclock(void);
! 65: void setsoftnet(void);
! 66: void clearsoftnet(void);
! 67: int splsoftnet(void);
! 68:
! 69: void do_pending_int(void);
! 70:
! 71: extern int imask[IPL_NUM];
! 72:
! 73: /* SPL asserts */
! 74: #define splassert(wantipl) /* nothing */
! 75:
! 76: /*
! 77: * Reorder protection in the following inline functions is
! 78: * achived with an empty asm volatile statement. the compiler
! 79: * will not move instructions past asm volatiles.
! 80: */
! 81: volatile static __inline int
! 82: splraise(int newcpl)
! 83: {
! 84: struct cpu_info *ci = curcpu();
! 85: int oldcpl;
! 86:
! 87: __asm__ volatile("":::"memory"); /* don't reorder.... */
! 88: oldcpl = ci->ci_cpl;
! 89: ci->ci_cpl = oldcpl | newcpl;
! 90: __asm__ volatile("":::"memory"); /* don't reorder.... */
! 91: return(oldcpl);
! 92: }
! 93:
! 94: volatile static __inline void
! 95: splx(int newcpl)
! 96: {
! 97: struct cpu_info *ci = curcpu();
! 98:
! 99: __asm__ volatile("":::"memory"); /* reorder protect */
! 100: ci->ci_cpl = newcpl;
! 101: if(ci->ci_ipending & ~newcpl)
! 102: do_pending_int();
! 103: __asm__ volatile("":::"memory"); /* reorder protect */
! 104: }
! 105:
! 106: volatile static __inline int
! 107: spllower(int newcpl)
! 108: {
! 109: struct cpu_info *ci = curcpu();
! 110: int oldcpl;
! 111:
! 112: __asm__ volatile("":::"memory"); /* reorder protect */
! 113: oldcpl = ci->ci_cpl;
! 114: ci->ci_cpl = newcpl;
! 115: if(ci->ci_ipending & ~newcpl)
! 116: do_pending_int();
! 117: __asm__ volatile("":::"memory"); /* reorder protect */
! 118: return(oldcpl);
! 119: }
! 120:
! 121: #define set_sint(p) atomic_setbits_int(&curcpu()->ci_ipending, p)
! 122:
! 123: #define SINT_CLOCK 0x10000000
! 124: #define SINT_NET 0x20000000
! 125: #define SINT_TTY 0x40000000
! 126: #define SPL_CLOCK 0x80000000
! 127: #define SINT_MASK (SINT_CLOCK|SINT_NET|SINT_TTY)
! 128:
! 129: #define splbio() splraise(imask[IPL_BIO])
! 130: #define splnet() splraise(imask[IPL_NET])
! 131: #define spltty() splraise(imask[IPL_TTY])
! 132: #define splaudio() splraise(imask[IPL_AUDIO])
! 133: #define splclock() splraise(imask[IPL_CLOCK])
! 134: #define splvm() splraise(imask[IPL_VM])
! 135: #define splsched() splhigh()
! 136: #define spllock() splhigh()
! 137: #define splstatclock() splhigh()
! 138: #define splsoftclock() splraise(SINT_CLOCK)
! 139: #define splsoftnet() splraise(SINT_NET|SINT_CLOCK)
! 140: #define splsofttty() splraise(SINT_TTY|SINT_NET|SINT_CLOCK)
! 141:
! 142: #define setsoftclock() set_sint(SINT_CLOCK);
! 143: #define setsoftnet() set_sint(SINT_NET);
! 144: #define setsofttty() set_sint(SINT_TTY);
! 145:
! 146: #define splhigh() splraise(0xffffffff)
! 147: #define spl0() spllower(0)
! 148:
! 149: /*
! 150: * Interrupt control struct used to control the ICU setup.
! 151: */
! 152:
! 153: struct intrhand {
! 154: struct intrhand *ih_next;
! 155: int (*ih_fun)(void *);
! 156: void *ih_arg;
! 157: struct evcount ih_count;
! 158: int ih_level;
! 159: int ih_irq;
! 160: char *ih_what;
! 161: };
! 162: extern int ppc_configed_intr_cnt;
! 163: #define MAX_PRECONF_INTR 16
! 164: extern struct intrhand ppc_configed_intr[MAX_PRECONF_INTR];
! 165: void softnet(int isr);
! 166:
! 167: #endif /* _LOCORE */
! 168: #endif /* _POWERPC_INTR_H_ */
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