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Annotation of sys/arch/mvmeppc/dev/openpicreg.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: openpicreg.h,v 1.2 2001/07/04 08:31:31 niklas Exp $   */
                      2: /*     $NetBSD: openpicreg.h,v 1.1 2000/02/14 12:45:53 tsubai Exp $    */
                      3:
                      4: /*-
                      5:  * Copyright (c) 2000 Tsubai Masanari.  All rights reserved.
                      6:  *
                      7:  * Redistribution and use in source and binary forms, with or without
                      8:  * modification, are permitted provided that the following conditions
                      9:  * are met:
                     10:  * 1. Redistributions of source code must retain the above copyright
                     11:  *    notice, this list of conditions and the following disclaimer.
                     12:  * 2. Redistributions in binary form must reproduce the above copyright
                     13:  *    notice, this list of conditions and the following disclaimer in the
                     14:  *    documentation and/or other materials provided with the distribution.
                     15:  * 3. The name of the author may not be used to endorse or promote products
                     16:  *    derived from this software without specific prior written permission.
                     17:  *
                     18:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     19:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     20:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     21:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
                     22:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
                     23:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
                     24:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
                     25:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
                     26:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
                     27:  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
                     28:  */
                     29:
                     30: /*
                     31:  * GLOBAL/TIMER register (IDU base + 0x1000)
                     32:  */
                     33:
                     34: /* feature reporting reg 0 */
                     35: #define OPENPIC_FEATURE                        0x1000
                     36:
                     37: /* global config reg 0 */
                     38: #define OPENPIC_CONFIG                 0x1020
                     39: #define  OPENPIC_CONFIG_RESET                  0x80000000
                     40: #define  OPENPIC_CONFIG_8259_PASSTHRU_DISABLE  0x20000000
                     41:
                     42: /* vendor ID */
                     43: #define OPENPIC_VENDOR_ID              0x1080
                     44:
                     45: /* processor initialization reg */
                     46: #define OPENPIC_PROC_INIT              0x1090
                     47:
                     48: /* IPI vector/priority reg */
                     49: #define OPENPIC_IPI_VECTOR(ipi)                (0x10a0 + (ipi) * 0x10)
                     50:
                     51: /* spurious intr. vector */
                     52: #define OPENPIC_SPURIOUS_VECTOR                0x10e0
                     53:
                     54:
                     55: /*
                     56:  * INTERRUPT SOURCE register (IDU base + 0x10000)
                     57:  */
                     58:
                     59: /* interrupt vector/priority reg */
                     60: #define OPENPIC_SRC_VECTOR(irq)                (0x10000 + (irq) * 0x20)
                     61: #define  OPENPIC_SENSE_LEVEL                   0x00400000
                     62: #define  OPENPIC_SENSE_EDGE                    0x00000000
                     63: #define  OPENPIC_POLARITY_POSITIVE             0x00800000
                     64: #define  OPENPIC_POLARITY_NEGATIVE             0x00000000
                     65: #define  OPENPIC_IMASK                         0x80000000
                     66: #define  OPENPIC_ACTIVITY                      0x40000000
                     67: #define  OPENPIC_PRIORITY_MASK                 0x000f0000
                     68: #define  OPENPIC_PRIORITY_SHIFT                        16
                     69: #define  OPENPIC_VECTOR_MASK                   0x000000ff
                     70:
                     71: /* interrupt destination cpu */
                     72: #define OPENPIC_SRC_DEST(irq)          (0x10010 + (irq) * 0x20)
                     73:
                     74: #define CPU(x)                         (1 << (x))
                     75:
                     76: /*
                     77:  * PROCESSOR register (IDU base + 0x20000)
                     78:  */
                     79:
                     80: /* IPI command reg */
                     81: #define OPENPIC_IPI(cpu, ipi)          (0x20040 + (cpu) * 0x1000 + (ipi))
                     82:
                     83: /* current task priority reg */
                     84: #define OPENPIC_CPU_PRIORITY(cpu)      (0x20080 + (cpu) * 0x1000)
                     85: #define  OPENPIC_CPU_PRIORITY_MASK             0x0000000f
                     86:
                     87: /* interrupt acknowledge reg */
                     88: #define OPENPIC_IACK(cpu)              (0x200a0 + (cpu) * 0x1000)
                     89:
                     90: /* end of interrupt reg */
                     91: #define OPENPIC_EOI(cpu)               (0x200b0 + (cpu) * 0x1000)