Annotation of sys/arch/mvme88k/stand/netboot/if_iereg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: if_iereg.h,v 1.2 1998/08/22 08:38:01 smurph Exp $ */
2:
3: /*
4: * if_sunie.h
5: *
6: * sun's ie interface
7: */
8:
9: /*
10: * programming notes:
11: *
12: * the ie chip operates in a 24 bit address space.
13: *
14: * most ie interfaces appear to be divided into two parts:
15: * - generic 586 stuff
16: * - board specific
17: *
18: * generic:
19: * the generic stuff of the ie chip is all done with data structures
20: * that live in the chip's memory address space. the chip expects
21: * its main data structure (the sys conf ptr -- SCP) to be at a fixed
22: * address in its 24 bit space: 0xfffff4
23: *
24: * the SCP points to another structure called the ISCP.
25: * the ISCP points to another structure called the SCB.
26: * the SCB has a status field, a linked list of "commands", and
27: * a linked list of "receive buffers". these are data structures that
28: * live in memory, not registers.
29: *
30: * board:
31: * to get the chip to do anything, you first put a command in the
32: * command data structure list. then you have to signal "attention"
33: * to the chip to get it to look at the command. how you
34: * signal attention depends on what board you have... on PC's
35: * there is an i/o port number to do this, on sun's there is a
36: * register bit you toggle.
37: *
38: * to get data from the chip you program it to interrupt...
39: *
40: *
41: * sun issues:
42: *
43: * there are 3 kinds of sun "ie" interfaces:
44: * 1 - a VME/multibus card
45: * 2 - an on-board interface (sun3's, sun-4/100's, and sun-4/200's)
46: * 3 - another VME board called the 3E
47: *
48: * the VME boards lives in vme16 space. only 16 and 8 bit accesses
49: * are allowed, so functions that copy data must be aware of this.
50: *
51: * the chip is an intel chip. this means that the byte order
52: * on all the "short"s in the chip's data structures is wrong.
53: * so, constants described in the intel docs are swapped for the sun.
54: * that means that any buffer pointers you give the chip must be
55: * swapped to intel format. yuck.
56: *
57: * VME/multibus interface:
58: * for the multibus interface the board ignores the top 4 bits
59: * of the chip address. the multibus interface seems to have its
60: * own MMU like page map (without protections or valid bits, etc).
61: * there are 256 pages of physical memory on the board (each page
62: * is 1024 bytes). there are 1024 slots in the page map. so,
63: * a 1024 byte page takes up 10 bits of address for the offset,
64: * and if there are 1024 slots in the page that is another 10 bits
65: * of the address. that makes a 20 bit address, and as stated
66: * earlier the board ignores the top 4 bits, so that accounts
67: * for all 24 bits of address.
68: *
69: * note that the last entry of the page map maps the top of the
70: * 24 bit address space and that the SCP is supposed to be at
71: * 0xfffff4 (taking into account allignment). so,
72: * for multibus, that entry in the page map has to be used for the SCP.
73: *
74: * the page map effects BOTH how the ie chip sees the
75: * memory, and how the host sees it.
76: *
77: * the page map is part of the "register" area of the board
78: *
79: * on-board interface:
80: *
81: * <fill in useful info later>
82: *
83: *
84: * VME3E interface:
85: *
86: * <fill in useful info later>
87: *
88: */
89:
90: /*
91: * PART 1: VME/multibus defs
92: */
93: #define IEVME_PAGESIZE 1024 /* bytes */
94: #define IEVME_PAGSHIFT 10 /* bits */
95: #define IEVME_NPAGES 256 /* number of pages on chip */
96: #define IEVME_MAPSZ 1024 /* number of entries in the map */
97:
98: /*
99: * PTE for the page map
100: */
101: #define IEVME_SBORDR 0x8000 /* sun byte order */
102: #define IEVME_IBORDR 0x0000 /* intel byte ordr */
103:
104: #define IEVME_P2MEM 0x2000 /* memory is on P2 */
105: #define IEVME_OBMEM 0x0000 /* memory is on board */
106:
107: #define IEVME_PGMASK 0x0fff /* gives the physical page frame number */
108:
109: struct ievme {
110: u_short pgmap[IEVME_MAPSZ];
111: u_short xxx[32]; /* prom */
112: u_short status; /* see below for bits */
113: u_short xxx2; /* filler */
114: u_short pectrl; /* parity control (see below) */
115: u_short peaddr; /* low 16 bits of address */
116: };
117: /*
118: * status bits
119: */
120: #define IEVME_RESET 0x8000 /* reset board */
121: #define IEVME_ONAIR 0x4000 /* go out of loopback 'on-air' */
122: #define IEVME_ATTEN 0x2000 /* attention */
123: #define IEVME_IENAB 0x1000 /* interrupt enable */
124: #define IEVME_PEINT 0x0800 /* parity error interrupt enable */
125: #define IEVME_PERR 0x0200 /* parity error flag */
126: #define IEVME_INT 0x0100 /* interrupt flag */
127: #define IEVME_P2EN 0x0020 /* enable p2 bus */
128: #define IEVME_256K 0x0010 /* 256kb rams */
129: #define IEVME_HADDR 0x000f /* mask for bits 17-20 of address */
130:
131: /*
132: * parity control
133: */
134: #define IEVME_PARACK 0x0100 /* parity error ack */
135: #define IEVME_PARSRC 0x0080 /* parity error source */
136: #define IEVME_PAREND 0x0040 /* which end of the data got the error */
137: #define IEVME_PARADR 0x000f /* mask to get bits 17-20 of parity address */
138:
139:
140: /*
141: * PART 2: the on-board interface
142: */
143: struct ieob {
144: u_char obctrl;
145: };
146: #define IEOB_NORSET 0x80 /* don't reset the board */
147: #define IEOB_ONAIR 0x40 /* put us on the air */
148: #define IEOB_ATTEN 0x20 /* attention! */
149: #define IEOB_IENAB 0x10 /* interrupt enable */
150: #define IEOB_XXXXX 0x08 /* free bit */
151: #define IEOB_XCVRL2 0x04 /* level 2 transceiver? */
152: #define IEOB_BUSERR 0x02 /* bus error */
153: #define IEOB_INT 0x01 /* interrupt */
154:
155: #define IEOB_ADBASE 0xff000000 /* KVA base addr of 24 bit address space */
156:
157: /*
158: * PART 3: the 3E board
159: */
160:
161: /*
162: * not supported (yet?)
163: */
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