File: [local] / sys / arch / mvme88k / mvme88k / m88410.c (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:04:33 2008 UTC (16 years, 6 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
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/* $OpenBSD: m88410.c,v 1.2 2006/05/07 17:44:28 miod Exp $ */
/*
* Copyright (c) 2001 Steve Murphree, Jr.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Steve Murphree.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <machine/asm_macro.h>
#include <machine/m88410.h>
#include <mvme88k/dev/busswreg.h>
#define XCC_NOP "0x00"
#define XCC_FLUSH_PAGE "0x01"
#define XCC_FLUSH_ALL "0x02"
#define XCC_INVAL_ALL "0x03"
#define XCC_ADDR 0xff800000
void
mc88410_flush_page(paddr_t physaddr)
{
paddr_t xccaddr = XCC_ADDR | (physaddr >> PGSHIFT);
u_int psr;
u_int16_t bs_gcsr, bs_romcr;
bs_gcsr = *(volatile u_int16_t *)(BS_BASE + BS_GCSR);
bs_romcr = *(volatile u_int16_t *)(BS_BASE + BS_ROMCR);
/*
* Since the page number is unlikely to be a multiple of 4, we need
* to mask misaligned exceptions.
*/
set_psr((psr = get_psr()) | PSR_MXM);
/* clear WEN0 and WEN1 in ROMCR (disables writes to FLASH) */
*(volatile u_int16_t *)(BS_BASE + BS_ROMCR) =
bs_romcr & ~(BS_ROMCR_WEN0 | BS_ROMCR_WEN1);
/* set XCC bit in GCSR (0xff8xxxxx now decodes to mc88410) */
*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
/* send command */
__asm__ __volatile__ (
"or r2, r0, " XCC_FLUSH_PAGE ";"
"or r3, r0, r0;"
"st.d r2, %0, 0" : : "r" (xccaddr) : "r2", "r3");
/* spin until the operation is complete */
while ((*(volatile u_int32_t *)(BS_BASE + BS_XCCR) & BS_XCC_FBSY) != 0)
;
/* restore PSR and friends */
set_psr(psr);
flush_pipeline();
*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr;
*(volatile u_int16_t *)(BS_BASE + BS_ROMCR) = bs_romcr;
}
void
mc88410_flush(void)
{
u_int16_t bs_gcsr, bs_romcr;
bs_gcsr = *(volatile u_int16_t *)(BS_BASE + BS_GCSR);
bs_romcr = *(volatile u_int16_t *)(BS_BASE + BS_ROMCR);
/* clear WEN0 and WEN1 in ROMCR (disables writes to FLASH) */
*(volatile u_int16_t *)(BS_BASE + BS_ROMCR) =
bs_romcr & ~(BS_ROMCR_WEN0 | BS_ROMCR_WEN1);
/* set XCC bit in GCSR (0xFF8xxxxx now decodes to mc88410) */
*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
/* send command */
__asm__ __volatile__ (
"or r2, r0, " XCC_FLUSH_ALL ";"
"or r3, r0, r0;"
"st.d r2, %0, 0" : : "r" (XCC_ADDR) : "r2", "r3");
/* spin until the operation is complete */
while ((*(volatile u_int32_t *)(BS_BASE + BS_XCCR) & BS_XCC_FBSY) != 0)
;
*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr;
*(volatile u_int16_t *)(BS_BASE + BS_ROMCR) = bs_romcr;
}
void
mc88410_inval(void)
{
u_int16_t bs_gcsr, bs_romcr;
u_int32_t dummy;
bs_gcsr = *(volatile u_int16_t *)(BS_BASE + BS_GCSR);
bs_romcr = *(volatile u_int16_t *)(BS_BASE + BS_ROMCR);
/* clear WEN0 and WEN1 in ROMCR (disables writes to FLASH) */
*(volatile u_int16_t *)(BS_BASE + BS_ROMCR) =
bs_romcr & ~(BS_ROMCR_WEN0 | BS_ROMCR_WEN1);
/* set XCC bit in GCSR (0xFF8xxxxx now decodes to mc88410) */
*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
/* send command */
__asm__ __volatile__ (
"or r2, r0, " XCC_INVAL_ALL ";"
"or r3, r0, r0;"
"st.d r2, %0, 0" : : "r" (XCC_ADDR) : "r2", "r3");
/*
* The 88410 will not let the 88110 access it until the
* invalidate all operation is complete. Simply force a read
* access which will spin as long as necessary.
*/
dummy = *(volatile u_int32_t *)(BS_BASE + BS_XCCR);
*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr;
*(volatile u_int16_t *)(BS_BASE + BS_ROMCR) = bs_romcr;
}