Annotation of sys/arch/mvme88k/mvme88k/m88410.c, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: m88410.c,v 1.2 2006/05/07 17:44:28 miod Exp $ */
! 2: /*
! 3: * Copyright (c) 2001 Steve Murphree, Jr.
! 4: * All rights reserved.
! 5: *
! 6: * Redistribution and use in source and binary forms, with or without
! 7: * modification, are permitted provided that the following conditions
! 8: * are met:
! 9: * 1. Redistributions of source code must retain the above copyright
! 10: * notice, this list of conditions and the following disclaimer.
! 11: * 2. Redistributions in binary form must reproduce the above copyright
! 12: * notice, this list of conditions and the following disclaimer in the
! 13: * documentation and/or other materials provided with the distribution.
! 14: * 3. All advertising materials mentioning features or use of this software
! 15: * must display the following acknowledgement:
! 16: * This product includes software developed by Steve Murphree.
! 17: * 4. The name of the author may not be used to endorse or promote products
! 18: * derived from this software without specific prior written permission
! 19: *
! 20: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 21: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
! 22: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
! 23: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
! 24: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
! 25: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
! 26: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
! 27: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
! 28: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
! 29: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! 30: *
! 31: */
! 32:
! 33: #include <sys/param.h>
! 34: #include <sys/systm.h>
! 35:
! 36: #include <machine/asm_macro.h>
! 37: #include <machine/m88410.h>
! 38:
! 39: #include <mvme88k/dev/busswreg.h>
! 40:
! 41: #define XCC_NOP "0x00"
! 42: #define XCC_FLUSH_PAGE "0x01"
! 43: #define XCC_FLUSH_ALL "0x02"
! 44: #define XCC_INVAL_ALL "0x03"
! 45: #define XCC_ADDR 0xff800000
! 46:
! 47: void
! 48: mc88410_flush_page(paddr_t physaddr)
! 49: {
! 50: paddr_t xccaddr = XCC_ADDR | (physaddr >> PGSHIFT);
! 51: u_int psr;
! 52: u_int16_t bs_gcsr, bs_romcr;
! 53:
! 54: bs_gcsr = *(volatile u_int16_t *)(BS_BASE + BS_GCSR);
! 55: bs_romcr = *(volatile u_int16_t *)(BS_BASE + BS_ROMCR);
! 56:
! 57: /*
! 58: * Since the page number is unlikely to be a multiple of 4, we need
! 59: * to mask misaligned exceptions.
! 60: */
! 61: set_psr((psr = get_psr()) | PSR_MXM);
! 62:
! 63: /* clear WEN0 and WEN1 in ROMCR (disables writes to FLASH) */
! 64: *(volatile u_int16_t *)(BS_BASE + BS_ROMCR) =
! 65: bs_romcr & ~(BS_ROMCR_WEN0 | BS_ROMCR_WEN1);
! 66:
! 67: /* set XCC bit in GCSR (0xff8xxxxx now decodes to mc88410) */
! 68: *(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
! 69:
! 70: /* send command */
! 71: __asm__ __volatile__ (
! 72: "or r2, r0, " XCC_FLUSH_PAGE ";"
! 73: "or r3, r0, r0;"
! 74: "st.d r2, %0, 0" : : "r" (xccaddr) : "r2", "r3");
! 75:
! 76: /* spin until the operation is complete */
! 77: while ((*(volatile u_int32_t *)(BS_BASE + BS_XCCR) & BS_XCC_FBSY) != 0)
! 78: ;
! 79:
! 80: /* restore PSR and friends */
! 81: set_psr(psr);
! 82: flush_pipeline();
! 83: *(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr;
! 84: *(volatile u_int16_t *)(BS_BASE + BS_ROMCR) = bs_romcr;
! 85: }
! 86:
! 87: void
! 88: mc88410_flush(void)
! 89: {
! 90: u_int16_t bs_gcsr, bs_romcr;
! 91:
! 92: bs_gcsr = *(volatile u_int16_t *)(BS_BASE + BS_GCSR);
! 93: bs_romcr = *(volatile u_int16_t *)(BS_BASE + BS_ROMCR);
! 94:
! 95: /* clear WEN0 and WEN1 in ROMCR (disables writes to FLASH) */
! 96: *(volatile u_int16_t *)(BS_BASE + BS_ROMCR) =
! 97: bs_romcr & ~(BS_ROMCR_WEN0 | BS_ROMCR_WEN1);
! 98:
! 99: /* set XCC bit in GCSR (0xFF8xxxxx now decodes to mc88410) */
! 100: *(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
! 101:
! 102: /* send command */
! 103: __asm__ __volatile__ (
! 104: "or r2, r0, " XCC_FLUSH_ALL ";"
! 105: "or r3, r0, r0;"
! 106: "st.d r2, %0, 0" : : "r" (XCC_ADDR) : "r2", "r3");
! 107:
! 108: /* spin until the operation is complete */
! 109: while ((*(volatile u_int32_t *)(BS_BASE + BS_XCCR) & BS_XCC_FBSY) != 0)
! 110: ;
! 111:
! 112: *(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr;
! 113: *(volatile u_int16_t *)(BS_BASE + BS_ROMCR) = bs_romcr;
! 114: }
! 115:
! 116: void
! 117: mc88410_inval(void)
! 118: {
! 119: u_int16_t bs_gcsr, bs_romcr;
! 120: u_int32_t dummy;
! 121:
! 122: bs_gcsr = *(volatile u_int16_t *)(BS_BASE + BS_GCSR);
! 123: bs_romcr = *(volatile u_int16_t *)(BS_BASE + BS_ROMCR);
! 124:
! 125: /* clear WEN0 and WEN1 in ROMCR (disables writes to FLASH) */
! 126: *(volatile u_int16_t *)(BS_BASE + BS_ROMCR) =
! 127: bs_romcr & ~(BS_ROMCR_WEN0 | BS_ROMCR_WEN1);
! 128:
! 129: /* set XCC bit in GCSR (0xFF8xxxxx now decodes to mc88410) */
! 130: *(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
! 131:
! 132: /* send command */
! 133: __asm__ __volatile__ (
! 134: "or r2, r0, " XCC_INVAL_ALL ";"
! 135: "or r3, r0, r0;"
! 136: "st.d r2, %0, 0" : : "r" (XCC_ADDR) : "r2", "r3");
! 137:
! 138: /*
! 139: * The 88410 will not let the 88110 access it until the
! 140: * invalidate all operation is complete. Simply force a read
! 141: * access which will spin as long as necessary.
! 142: */
! 143: dummy = *(volatile u_int32_t *)(BS_BASE + BS_XCCR);
! 144:
! 145: *(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr;
! 146: *(volatile u_int16_t *)(BS_BASE + BS_ROMCR) = bs_romcr;
! 147: }
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