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Annotation of sys/arch/mvme88k/include/mvme187.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: mvme187.h,v 1.9 2006/11/18 22:53:11 miod Exp $ */
                      2: /*
                      3:  * Copyright (c) 1996 Nivas Madhur
                      4:  * Copyright (c) 1999 Steve Murphree, Jr.
                      5:  * All rights reserved.
                      6:  *
                      7:  * Redistribution and use in source and binary forms, with or without
                      8:  * modification, are permitted provided that the following conditions
                      9:  * are met:
                     10:  * 1. Redistributions of source code must retain the above copyright
                     11:  *    notice, this list of conditions and the following disclaimer.
                     12:  * 2. Redistributions in binary form must reproduce the above copyright
                     13:  *    notice, this list of conditions and the following disclaimer in the
                     14:  *    documentation and/or other materials provided with the distribution.
                     15:  * 3. All advertising materials mentioning features or use of this software
                     16:  *    must display the following acknowledgement:
                     17:  *      This product includes software developed by Nivas Madhur.
                     18:  * 4. The name of the author may not be used to endorse or promote products
                     19:  *    derived from this software without specific prior written permission
                     20:  *
                     21:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     22:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     23:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     24:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
                     25:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
                     26:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
                     27:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
                     28:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
                     29:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
                     30:  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
                     31:  *
                     32:  */
                     33: /*
                     34:  * Mach Operating System
                     35:  * Copyright (c) 1991 Carnegie Mellon University
                     36:  * Copyright (c) 1991 OMRON Corporation
                     37:  * All Rights Reserved.
                     38:  *
                     39:  * Permission to use, copy, modify and distribute this software and its
                     40:  * documentation is hereby granted, provided that both the copyright
                     41:  * notice and this permission notice appear in all copies of the
                     42:  * software, derivative works or modified versions, and any portions
                     43:  * thereof, and that both notices appear in supporting documentation.
                     44:  *
                     45:  */
                     46: #ifndef __MACHINE_MVME187_H__
                     47: #define __MACHINE_MVME187_H__
                     48:
                     49: #define BUG187_START   0xff800000      /* start of BUG PROM */
                     50: #define BUG187_SIZE    0x00400000      /* size of BUG PROM */
                     51: #define SRAM_START     0xffe00000      /* start of sram used by bug */
                     52: #define SRAM_SIZE      0x00020000      /* size of sram */
                     53: #define OBIO187_START  0xfff40000      /* start of local IO */
                     54: #define OBIO187_SIZE   0x000b0000      /* size of obio space */
                     55:
                     56: #define SBC_CMMU_I     0xfff77000      /* Single Board Computer code CMMU */
                     57: #define SBC_CMMU_D     0xfff7f000      /* Single Board Computer data CMMU */
                     58:
                     59: #define M187_ILEVEL    0xfff4203e      /* interrupt priority level */
                     60: #define M187_IMASK     0xfff4203f      /* interrupt mask level */
                     61: #define M187_ISRC      0x00000000      /* interrupt mask src (NULL) */
                     62: #define M187_IACK      0xfffe0000      /* interrupt ACK base */
                     63:
                     64: #define MEM_CTLR       0xfff43000      /* MEMC040 mem controller */
                     65:
                     66: #if defined(_KERNEL) && !defined(_LOCORE)
                     67: extern u_int32_t pfsr_save_187[];
                     68: #endif
                     69:
                     70: #endif /* __MACHINE_MVME187_H__ */