Annotation of sys/arch/mvme88k/dev/vme.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: vme.h,v 1.17 2005/11/25 22:14:32 miod Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 1995 Theo de Raadt
! 5: * All rights reserved.
! 6: *
! 7: * Redistribution and use in source and binary forms, with or without
! 8: * modification, are permitted provided that the following conditions
! 9: * are met:
! 10: * 1. Redistributions of source code must retain the above copyright
! 11: * notice, this list of conditions and the following disclaimer.
! 12: * 2. Redistributions in binary form must reproduce the above copyright
! 13: * notice, this list of conditions and the following disclaimer in the
! 14: * documentation and/or other materials provided with the distribution.
! 15: *
! 16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 17: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
! 18: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
! 19: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
! 20: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
! 21: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
! 22: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
! 23: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
! 24: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
! 25: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! 26: */
! 27:
! 28: #ifndef __MVEME88K_DEV_VME_H__
! 29: #define __MVEME88K_DEV_VME_H__
! 30:
! 31: struct vmesoftc {
! 32: struct device sc_dev;
! 33: bus_space_tag_t sc_iot;
! 34: bus_space_handle_t sc_ioh;
! 35: struct intrhand sc_abih; /* `abort' switch */
! 36: };
! 37:
! 38: /*
! 39: * XXX: this chip has some rather insane access rules!
! 40: */
! 41:
! 42: #define VME2_BASE 0xfff40000
! 43:
! 44: #define VME2_SADDR1 0x0000
! 45: #define VME2_SADDR2 0x0004
! 46: #define VME2_SLAVELMOD1 0x0008
! 47: #define VME2_SLAVELMOD2 0x000c
! 48: #define VME2_SLAVECTL 0x0010
! 49: #define VME2_MASTER1 0x0014
! 50: #define VME2_MASTER2 0x0018
! 51: #define VME2_MASTER3 0x001c
! 52: #define VME2_MASTER4 0x0020
! 53: #define VME2_MASTER4MOD 0x0024
! 54: #define VME2_MASTERCTL 0x0028
! 55: #define VME2_GCSRCTL 0x002c
! 56: #define VME2_DMACTL 0x0030
! 57: #define VME2_DMAMODE 0x0034
! 58: #define VME2_DMALADDR 0x0038
! 59: #define VME2_DMAVMEADDR 0x003c
! 60: #define VME2_DMACOUNT 0x0040
! 61: #define VME2_DMATABLE 0x0044
! 62: #define VME2_DMASTAT 0x0048
! 63: #define VME2_TCR 0x004c
! 64: #define VME2_T1CMP 0x0050
! 65: #define VME2_T1COUNT 0x0054
! 66: #define VME2_T2CMP 0x0058
! 67: #define VME2_T2COUNT 0x005c
! 68: #define VME2_TCTL 0x0060
! 69: #define VME2_PRESCALE 0x0064
! 70: #define VME2_IRQSTAT 0x0068
! 71: #define VME2_IRQEN 0x006c
! 72: #define VME2_SETSOFTIRQ 0x0070
! 73: #define VME2_IRQCLR 0x0074
! 74: #define VME2_IRQL1 0x0078
! 75: #define VME2_IRQL2 0x007c
! 76: #define VME2_IRQL3 0x0080
! 77: #define VME2_IRQL4 0x0084
! 78: #define VME2_VBR 0x0088
! 79: #define VME2_MISC 0x008c
! 80:
! 81: #define VME2_SADDR_END 0xffff0000 /* VME address END & START */
! 82: #define VME2_SADDR_START 0x0000ffff
! 83: #define VME2_SADDR_LADDR 0xffff0000 /* local base address */
! 84: #define VME2_SADDR_SIZE(mem) (0x1000 - (mem) >> 16) /* encoding of size */
! 85:
! 86: #define VME2_SLAVE_CHOOSE(bits, num) ((bits) << (16*((num)-1)))
! 87: #define VME2_SLAVECTL_WP 0x00000100 /* write posting */
! 88: #define VME2_SLAVECTL_SNP_NO 0x00000000 /* no snooping */
! 89: #define VME2_SLAVECTL_SNP_SINK 0x00000200 /* sink data */
! 90: #define VME2_SLAVECTL_SNP_INVAL 0x00000400 /* invalidate */
! 91: #define VME2_SLAVECTL_ADDER 0x00000800 /* use adder */
! 92: #define VME2_SLAVECTL_SUP 0x00000080 /* modifier bit */
! 93: #define VME2_SLAVECTL_USR 0x00000040 /* modifier bit */
! 94: #define VME2_SLAVECTL_A32 0x00000020 /* modifier bit */
! 95: #define VME2_SLAVECTL_A24 0x00000010 /* modifier bit */
! 96: #define VME2_SLAVECTL_D64 0x00000008 /* modifier bit */
! 97: #define VME2_SLAVECTL_BLK 0x00000004 /* modifier bit */
! 98: #define VME2_SLAVECTL_PGM 0x00000002 /* modifier bit */
! 99: #define VME2_SLAVECTL_DAT 0x00000001 /* modifier bit */
! 100:
! 101: #define VME2_MASTERCTL_4SHIFT 24
! 102: #define VME2_MASTERCTL_3SHIFT 16
! 103: #define VME2_MASTERCTL_2SHIFT 8
! 104: #define VME2_MASTERCTL_1SHIFT 0
! 105: #define VME2_MASTERCTL_D16 0x80
! 106: #define VME2_MASTERCTL_WP 0x40
! 107: #define VME2_MASTERCTL_AM 0x3f
! 108: #define VME2_MASTERCTL_AM24SB 0x3f /* A24 Supervisory Block Transfer */
! 109: #define VME2_MASTERCTL_AM24SP 0x3e /* A24 Supervisory Program Access */
! 110: #define VME2_MASTERCTL_AM24SD 0x3d /* A24 Supervisory Data Access */
! 111: #define VME2_MASTERCTL_AM24UB 0x3b /* A24 Non-priv. Block Transfer */
! 112: #define VME2_MASTERCTL_AM24UP 0x3a /* A24 Non-priv. Program Access */
! 113: #define VME2_MASTERCTL_AM24UD 0x39 /* A24 Non-priv. Data Access */
! 114: #define VME2_MASTERCTL_AM16S 0x2d /* A16 Supervisory Access */
! 115: #define VME2_MASTERCTL_AM16U 0x29 /* A16 Non-priv. Access */
! 116: #define VME2_MASTERCTL_AM32SB 0x0f /* A32 Supervisory Block Transfer */
! 117: #define VME2_MASTERCTL_AM32SP 0x0e /* A32 Supervisory Program Access */
! 118: #define VME2_MASTERCTL_AM32SD 0x0d /* A32 Supervisory Data Access */
! 119: #define VME2_MASTERCTL_AM32UB 0x0b /* A32 Non-priv. Block Transfer */
! 120: #define VME2_MASTERCTL_AM32UP 0x0a /* A32 Non-priv. Program Access */
! 121: #define VME2_MASTERCTL_AM32UD 0x09 /* A32 Non-priv Data Access */
! 122:
! 123: #define VME2_MASTERCTL_ALL 0xff
! 124:
! 125: #define VME2_GCSRCTL_OFF 0xf0000000
! 126: #define VME2_GCSRCTL_MDEN4 0x00080000
! 127: #define VME2_GCSRCTL_MDEN3 0x00040000
! 128: #define VME2_GCSRCTL_MDEN2 0x00020000
! 129: #define VME2_GCSRCTL_MDEN1 0x00010000
! 130: #define VME2_GCSRCTL_I2EN 0x00008000 /* F decode (A24D16/A32D16) on */
! 131: #define VME2_GCSRCTL_I2WP 0x00004000 /* F decode write post */
! 132: #define VME2_GCSRCTL_I2SU 0x00002000 /* F decode is supervisor */
! 133: #define VME2_GCSRCTL_I2PD 0x00001000 /* F decode is program */
! 134: #define VME2_GCSRCTL_I1EN 0x00000800 /* short decode (A16Dx) on */
! 135: #define VME2_GCSRCTL_I1D16 0x00000400 /* short decode is D16 */
! 136: #define VME2_GCSRCTL_I1WP 0x00000200 /* short decode write post */
! 137: #define VME2_GCSRCTL_I1SU 0x00000100 /* short decode is supervisor */
! 138: #define VME2_GCSRCTL_ROMSIZE 0x000000c0 /* size of ROM */
! 139: #define VME2_GCSRCTL_ROMBSPD 0x00000038 /* speed of ROM */
! 140: #define VME2_GCSRCTL_ROMASPD 0x00000007 /* speed of ROM */
! 141:
! 142: #define VME2_TCR_1MS (1 << 8) /* Watchdog 1 ms */
! 143: #define VME2_TCR_2MS (2 << 8) /* Watchdog 2 ms */
! 144: #define VME2_TCR_4MS (3 << 8) /* Watchdog 4 ms */
! 145: #define VME2_TCR_8MS (4 << 8) /* Watchdog 8 ms */
! 146: #define VME2_TCR_16MS (5 << 8) /* Watchdog 16 ms */
! 147: #define VME2_TCR_32MS (6 << 8) /* Watchdog 32 ms */
! 148: #define VME2_TCR_64MS (7 << 8) /* Watchdog 64 ms */
! 149: #define VME2_TCR_128MS (8 << 8) /* Watchdog 128 ms */
! 150: #define VME2_TCR_256MS (9 << 8) /* Watchdog 256 ms */
! 151: #define VME2_TCR_512MS (10 << 8) /* Watchdog 512 ms */
! 152: #define VME2_TCR_1S (11 << 8) /* Watchdog 1 s */
! 153: #define VME2_TCR_4S (12 << 8) /* Watchdog 4 s */
! 154: #define VME2_TCR_16S (13 << 8) /* Watchdog 16 s */
! 155: #define VME2_TCR_32S (14 << 8) /* Watchdog 32 s */
! 156: #define VME2_TCR_64S (15 << 8) /* Watchdog 64 s */
! 157:
! 158: #define VME2_TCTL1_CEN 0x01
! 159: #define VME2_TCTL1_COC 0x02
! 160: #define VME2_TCTL1_COVF 0x04
! 161: #define VME2_TCTL1_OVF 0xf0
! 162: #define VME2_TCTL2_CEN (0x01 << 8)
! 163: #define VME2_TCTL2_COC (0x02 << 8)
! 164: #define VME2_TCTL2_COVF (0x04 << 8)
! 165: #define VME2_TCTL2_OVF (0xf0 << 8)
! 166: #define VME2_TCTL_WDEN 0x00010000 /* Watchdog Enable */
! 167: #define VME2_TCTL_WDRSE 0x00020000 /* Watchdog Reset Enable */
! 168: #define VME2_TCTL_WDSL 0x00040000 /* local or system reset */
! 169: #define VME2_TCTL_WDBFE 0x00080000 /* Watchdog Board Fail Enable */
! 170: #define VME2_TCTL_WDTO 0x00100000 /* Watchdog Timeout Status */
! 171: #define VME2_TCTL_WDCC 0x00200000 /* Watchdog Clear Counter */
! 172: #define VME2_TCTL_WDCS 0x00400000 /* Watchdog Clear Timeout */
! 173: #define VME2_TCTL_SRST 0x00800000 /* system reset */
! 174: #define VME2_TCTL_RSWE 0x01000000 /* Reset Switch Enable */
! 175: #define VME2_TCTL_BDFLO 0x02000000 /* Assert Board Fail */
! 176: #define VME2_TCTL_CPURS 0x04000000 /* Clear Power-up Reset bit */
! 177: #define VME2_TCTL_PURS 0x08000000 /* Power-up Reset bit */
! 178: #define VME2_TCTL_BDFLI 0x10000000 /* Board Fail Status*/
! 179: #define VME2_TCTL_SYSFAIL 0x20000000 /* light SYSFAIL led */
! 180: #define VME2_TCTL_SCON 0x40000000 /* we are SCON */
! 181:
! 182: #define VME2_IRQ_ACF 0x80000000
! 183: #define VME2_IRQ_AB 0x40000000
! 184: #define VME2_IRQ_SYSF 0x20000000
! 185: #define VME2_IRQ_MWP 0x10000000
! 186: #define VME2_IRQ_PE 0x08000000
! 187: #define VME2_IRQ_V1IE 0x04000000
! 188: #define VME2_IRQ_TIC2 0x02000000
! 189: #define VME2_IRQ_TIC1 0x01000000
! 190: #define VME2_IRQ_VIA 0x00800000
! 191: #define VME2_IRQ_DMA 0x00400000
! 192: #define VME2_IRQ_SIG3 0x00200000
! 193: #define VME2_IRQ_SIG2 0x00100000
! 194: #define VME2_IRQ_SIG1 0x00080000
! 195: #define VME2_IRQ_SIG0 0x00040000
! 196: #define VME2_IRQ_LM1 0x00020000
! 197: #define VME2_IRQ_LM0 0x00010000
! 198: #define VME2_IRQ_SW7 0x00008000
! 199: #define VME2_IRQ_SW6 0x00004000
! 200: #define VME2_IRQ_SW5 0x00002000
! 201: #define VME2_IRQ_SW4 0x00001000
! 202: #define VME2_IRQ_SW3 0x00000800
! 203: #define VME2_IRQ_SW2 0x00000400
! 204: #define VME2_IRQ_SW1 0x00000200
! 205: #define VME2_IRQ_SW0 0x00000100
! 206: #define VME2_IRQ_SW(x) ((1 << (x))) << 8)
! 207: #define VME2_IRQ_SPARE 0x00000080
! 208: #define VME2_IRQ_VME7 0x00000040
! 209: #define VME2_IRQ_VME6 0x00000020
! 210: #define VME2_IRQ_VME5 0x00000010
! 211: #define VME2_IRQ_VME4 0x00000008
! 212: #define VME2_IRQ_VME3 0x00000004
! 213: #define VME2_IRQ_VME2 0x00000002
! 214: #define VME2_IRQ_VME1 0x00000001
! 215: #define VME2_IRQ_VME(x) (1 << ((x) - 1))
! 216:
! 217: #define VME2_IRQL1_ACFSHIFT 28
! 218: #define VME2_IRQL1_ABSHIFT 24
! 219: #define VME2_IRQL1_SYSFSHIFT 20
! 220: #define VME2_IRQL1_WPESHIFT 16
! 221: #define VME2_IRQL1_PESHIFT 12
! 222: #define VME2_IRQL1_V1IESHIFT 8
! 223: #define VME2_IRQL1_TIC2SHIFT 4
! 224: #define VME2_IRQL1_TIC1SHIFT 0
! 225:
! 226: #define VME2_IRQL2_VIASHIFT 28
! 227: #define VME2_IRQL2_DMASHIFT 24
! 228: #define VME2_IRQL2_SIG3SHIFT 20
! 229: #define VME2_IRQL2_SIG2SHIFT 16
! 230: #define VME2_IRQL2_SIG1SHIFT 12
! 231: #define VME2_IRQL2_SIG0SHIFT 8
! 232: #define VME2_IRQL2_LM1SHIFT 4
! 233: #define VME2_IRQL2_LM0SHIFT 0
! 234:
! 235: #define VME2_IRQL3_SW7SHIFT 28
! 236: #define VME2_IRQL3_SW6SHIFT 24
! 237: #define VME2_IRQL3_SW5SHIFT 20
! 238: #define VME2_IRQL3_SW4SHIFT 16
! 239: #define VME2_IRQL3_SW3SHIFT 12
! 240: #define VME2_IRQL3_SW2SHIFT 8
! 241: #define VME2_IRQL3_SW1SHIFT 4
! 242: #define VME2_IRQL3_SW0SHIFT 0
! 243:
! 244: #define VME2_IRQL4_SPARESHIFT 28
! 245: #define VME2_IRQL4_VME7SHIFT 24
! 246: #define VME2_IRQL4_VME6SHIFT 20
! 247: #define VME2_IRQL4_VME5SHIFT 16
! 248: #define VME2_IRQL4_VME4SHIFT 12
! 249: #define VME2_IRQL4_VME3SHIFT 8
! 250: #define VME2_IRQL4_VME2SHIFT 4
! 251: #define VME2_IRQL4_VME1SHIFT 0
! 252:
! 253: #define VME2_SYSFAIL (1 << 22)
! 254: #define VME2_IOCTL1_MIEN (1 << 23)
! 255: #define VME2_VBR_0SHIFT 28
! 256: #define VME2_VBR_1SHIFT 24
! 257: #define VME2_SET_VBR0(x) ((x) << VME2_VBR_0SHIFT)
! 258: #define VME2_SET_VBR1(x) ((x) << VME2_VBR_1SHIFT)
! 259: #define VME2_GET_VBR0(x) ((((x) >> 28) & 0xf) << 4)
! 260: #define VME2_GET_VBR1(x) ((((x) >> 24) & 0xf) << 4)
! 261: #define VME2_VBR_GPOXXXX 0x00ffffff
! 262:
! 263: #define VME2_MISC_MPIRQEN 0x00000080 /* do not set */
! 264: #define VME2_MISC_REVEROM 0x00000040 /* 167: dis eprom. 166: en flash */
! 265: #define VME2_MISC_DISSRAM 0x00000020 /* do not set */
! 266: #define VME2_MISC_DISMST 0x00000010
! 267: #define VME2_MISC_NOELBBSY 0x00000008 /* do not set */
! 268: #define VME2_MISC_DISBSYT 0x00000004 /* do not set */
! 269: #define VME2_MISC_ENINT 0x00000002 /* do not set */
! 270: #define VME2_MISC_DISBGN 0x00000001 /* do not set */
! 271:
! 272: #define VME2_A16D32BASE 0xffff0000UL
! 273: #define VME2_A16D32LEN 0x00010000UL
! 274: #define VME2_A32D16BASE 0xf1000000UL
! 275: #define VME2_A32D16LEN 0x01000000UL
! 276: #define VME2_A16D16BASE 0xffff0000UL
! 277: #define VME2_A16D16LEN 0x00010000UL
! 278: #define VME2_A24D16BASE 0xf0000000UL
! 279: #define VME2_A24D16LEN 0x01000000UL
! 280: #define VME2_A16BASE 0xffff0000UL
! 281: #define VME2_A24BASE 0xff000000UL
! 282:
! 283: paddr_t vmepmap(struct device *sc, off_t vmeaddr, int bustype);
! 284: int vmerw(struct device *sc, struct uio *uio, int flags, int bus);
! 285: int vmeintr_establish(int, struct intrhand *, const char *);
! 286: int vme_findvec(int);
! 287: int vmescan(struct device *, void *, void *, int);
! 288:
! 289: #endif /* __MVEME88K_DEV_VME_H__ */
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