Annotation of sys/arch/mvme88k/dev/pcctworeg.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: pcctworeg.h,v 1.8 2006/04/27 20:19:28 miod Exp $ */
! 2:
! 3: /*
! 4: * Memory map for PCC2 chip found in MVME1x7 boards.
! 5: *
! 6: * PCCchip2 control and status register can be accessed as bytes (8 bits),
! 7: * two-bytes (16 bits), or four-bytes (32 bits).
! 8: */
! 9:
! 10: #define PCC2_BASE 0xfff42000
! 11: #define PCC2_SIZE 0x0040
! 12:
! 13: #define PCCTWO_CHIPID 0x0000
! 14: #define PCCTWO_CHIPREV 0x0001
! 15: #define PCCTWO_GENCTL 0x0002
! 16: #define PCCTWO_VECBASE 0x0003
! 17: #define PCCTWO_T1CMP 0x0004
! 18: #define PCCTWO_T1COUNT 0x0008
! 19: #define PCCTWO_T2CMP 0x000c
! 20: #define PCCTWO_T2COUNT 0x0010
! 21: #define PCCTWO_PSCALECNT 0x0014
! 22: #define PCCTWO_PSCALEADJ 0x0015
! 23: #define PCCTWO_T2CTL 0x0016
! 24: #define PCCTWO_T1CTL 0x0017
! 25: #define PCCTWO_GPIO_ICR 0x0018
! 26: #define PCCTWO_GPIO_PCR 0x0019
! 27: #define PCCTWO_T2ICR 0x001a
! 28: #define PCCTWO_T1ICR 0x001b
! 29: #define PCCTWO_SCCERR 0x001c
! 30: #define PCCTWO_SCCICR 0x001d
! 31: #define PCCTWO_SCCTX 0x001e
! 32: #define PCCTWO_SCCRX 0x001f
! 33: #define PCCTWO_SCCMOIACK 0x0023
! 34: #define PCCTWO_SCCTXIACK 0x0025
! 35: #define PCCTWO_SCCRXIACK 0x0027
! 36: #define PCCTWO_IEERR 0x0028
! 37: #define PCCTWO_IEICR 0x002a
! 38: #define PCCTWO_IEBERR 0x002b
! 39: #define PCCTWO_SCSIERR 0x002c
! 40: #define PCCTWO_SCSIICR 0x002f
! 41: #define PCCTWO_PRTICR 0x0030
! 42: #define PCCTWO_PTRFICR 0x0031
! 43: #define PCCTWO_PTRSICR 0x0032
! 44: #define PCCTWO_PTRPICR 0x0033
! 45: #define PCCTWO_PRTBICR 0x0034
! 46: #define PCCTWO_PRTSTATUS 0x0036
! 47: #define PCCTWO_PRTCTL 0x0037
! 48: #define PCCTWO_SPEED 0x0038
! 49: #define PCCTWO_PRTDATA 0x003a
! 50: /* The following registers are not valid on MVME197 */
! 51: #define PCCTWO_IPL 0x003e
! 52: #define PCCTWO_MASK 0x003f
! 53:
! 54: #define PCC2_ID 0x20 /* value at CHIPID */
! 55:
! 56: /* General Control Register */
! 57: #define PCC2_DR0 0x80
! 58: #define PCC2_C040 0x04
! 59: #define PCC2_MIEN 0x02
! 60: #define PCC2_FAST 0x01
! 61:
! 62: /* Top 4 bits of the PCC2 VBR. Will be the top 4 bits of the vector */
! 63: #define PCC2_VECT 0x50
! 64:
! 65: /* Bottom 4 bits of the vector returned during IACK cycle */
! 66: #define PCC2V_PPBUSY 0x00 /* lowest */
! 67: #define PCC2V_PPPE 0x01
! 68: #define PCC2V_PPSELECT 0x02
! 69: #define PCC2V_PPFAULT 0x03
! 70: #define PCC2V_PPACK 0x04
! 71: #define PCC2V_SCSI 0x05
! 72: #define PCC2V_IEFAIL 0x06
! 73: #define PCC2V_IE 0x07
! 74: #define PCC2V_TIMER2 0x08
! 75: #define PCC2V_TIMER1 0x09
! 76: #define PCC2V_GPIO 0x0a
! 77: #define PCC2V_SCC_RXE 0x0c
! 78: #define PCC2V_SCC_M (PCC2V_SCC_RXE + 1)
! 79: #define PCC2V_SCC_TX (PCC2V_SCC_M + 1)
! 80: #define PCC2V_SCC_RX (PCC2V_SCC_TX + 1)
! 81:
! 82: /*
! 83: * Vaddrs for interrupt mask and pri registers
! 84: */
! 85: extern u_int8_t *volatile pcc2intr_mask;
! 86: extern u_int8_t *volatile pcc2intr_ipl;
! 87:
! 88: /*
! 89: * We lock off our interrupt vector at 0x50.
! 90: */
! 91: #define PCC2_VECBASE 0x50
! 92: #define PCC2_NVEC 0x10
! 93:
! 94: #define PCC2_TCTL_CEN 0x01
! 95: #define PCC2_TCTL_COC 0x02
! 96: #define PCC2_TCTL_COVF 0x04
! 97: #define PCC2_TCTL_OVF 0xf0
! 98:
! 99: #define PCC2_GPIO_PLTY 0x80
! 100: #define PCC2_GPIO_EL 0x40
! 101:
! 102: #define PCC2_GPIOCR_OE 0x2
! 103: #define PCC2_GPIOCR_O 0x1
! 104:
! 105: #define PCC2_SCC_AVEC 0x08
! 106:
! 107: #define PCC2_SC_INHIBIT (0 << 6)
! 108: #define PCC2_SC_SNOOP (1 << 6)
! 109: #define PCC2_SC_INVAL (2 << 6)
! 110: #define PCC2_SC_RESV (3 << 6)
! 111:
! 112: #define pcc2_timer_us2lim(us) (us) /* timer increments in "us" */
! 113:
! 114: #define PCC2_IRQ_IPL 0x07
! 115: #define PCC2_IRQ_ICLR 0x08
! 116: #define PCC2_IRQ_IEN 0x10
! 117: #define PCC2_IRQ_INT 0x20
! 118:
! 119: /* Tick Timer Interrupt Control Register */
! 120: #define PCC2_TTIRQ_INT 0x20
! 121: #define PCC2_TTIRQ_IEN 0x10
! 122: #define PCC2_TTIRQ_ICLR 0x08
! 123: #define PCC2_TTIRQ_IL 0x07 /* mask for IL2-IL0 */
! 124:
! 125: #define PCC2_IEERR_SCLR 0x01
! 126:
! 127: #define PCC2_GENCTL_FAST 0x01
! 128: #define PCC2_GENCTL_IEN 0x02
! 129: #define PCC2_GENCTL_C040 0x03
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