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File: [local] / sys / arch / mvme88k / conf / M187 (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:04:35 2008 UTC (16 years, 5 months ago) by nbrk
Import of OpenBSD 4.2 release kernel tree with initial code to support Jornada 720/728, StrongARM 1110-based handheld PC. At this point kernel roots on NFS and boots into vfs_mountroot() and traps. What is supported: - glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode (needs some palette tweaks for non black/white/blue colors, i think) - saic, SA11x0 interrupt controller (needs cleanup) - sacom, SA11x0 UART (supported only as boot console for now) - SA11x0 GPIO controller fully supported (but can't handle multiple interrupt handlers on one gpio pin) - sassp, SSP port on SA11x0 that attaches spibus - Jornada microcontroller (jmcu) to control kbd, battery, etc throught the SPI bus (wskbd attaches on jmcu, but not tested) - tod functions seem work - initial code for SA-1111 (chip companion) : this is TODO Next important steps, i think: - gpio and intc on sa1111 - pcmcia support for sa11x0 (and sa1111 help logic) - REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs) - root on wd0! (using already supported PCMCIA-ATA) |
# $OpenBSD: M187,v 1.35 2006/05/28 11:09:56 miod Exp $ machine mvme88k m88k include "../../../conf/GENERIC" # Processor type option M88100 option MVME187 # support for 187 (requires M88100) # Define this if your processor has the xxx.usr bug (mask C82N) option ERRATA__XXX_USR maxusers 64 config bsd swap on generic # ------------------------------ devices -------------------------------- mainbus0 at root # ------------------------------ mainbus devices ------------------------ pcctwo0 at mainbus0 addr 0xfff00000 sram0 at mainbus0 addr 0xffe00000 # ------------------------------ pcctwo devices ------------------------- vme0 at pcctwo0 offset 0x40000 nvram0 at pcctwo0 offset 0xc0000 ie0 at pcctwo0 offset 0x46000 ipl 3 osiop0 at pcctwo0 offset 0x47000 ipl 2 cl0 at pcctwo0 offset 0x45000 ipl 3 cl1 at pcctwo0 offset 0x45200 ipl 3 # M8120 only #lptwo0 at pcctwo0 offset 0x45000 ipl 1 memc0 at pcctwo0 offset 0x43000 memc1 at pcctwo0 offset 0x43100 # ------------------------------ vme0 devices -------------------------- vmes0 at vme0 vmel0 at vme0 # ------------------------------ vmes0 devices ------------------------- vx0 at vmes0 addr 0xff780000 ipl 3 vx1 at vmes0 addr 0xff790000 ipl 3 vx2 at vmes0 addr 0xff7a0000 ipl 3 vx3 at vmes0 addr 0xff7b0000 ipl 3 le0 at vmes0 addr 0xffff1200 ipl 3 le1 at vmes0 addr 0xffff1400 ipl 3 le2 at vmes0 addr 0xffff1600 ipl 3 vs0 at vmes0 addr 0xffff9000 ipl 2 vs1 at vmes0 addr 0xffff9800 ipl 2 vs2 at vmes0 addr 0xffff4800 ipl 2 vs3 at vmes0 addr 0xffff5800 ipl 2 vs4 at vmes0 addr 0xffff7000 ipl 2 vs5 at vmes0 addr 0xffff7800 ipl 2 # ------------------------------- vs0 devices -------------------------- scsibus* at vs? # ----------------------------- osiop0 devices ------------------------- scsibus* at osiop? # ------------------------------ scsibus0 devices ---------------------- sd* at scsibus? st* at scsibus? cd* at scsibus?