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Annotation of sys/arch/mvme68k/include/intr.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: intr.h,v 1.15 2007/05/15 13:46:22 martin Exp $        */
                      2: /*
                      3:  * Copyright (C) 2000 Steve Murphree, Jr.
                      4:  * All rights reserved.
                      5:  *
                      6:  * Redistribution and use in source and binary forms, with or without
                      7:  * modification, are permitted provided that the following conditions
                      8:  * are met:
                      9:  * 1. Redistributions of source code must retain the above copyright
                     10:  *    notice, this list of conditions and the following disclaimer.
                     11:  * 2. Redistributions in binary form must reproduce the above copyright
                     12:  *    notice, this list of conditions and the following disclaimer in the
                     13:  *    documentation and/or other materials provided with the distribution.
                     14:  * 3. The name of the author may not be used to endorse or promote products
                     15:  *    derived from this software without specific prior written permission.
                     16:  *
                     17:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     18:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     19:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     20:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
                     21:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
                     22:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
                     23:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
                     24:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
                     25:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
                     26:  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
                     27:  */
                     28:
                     29: #ifndef _MVME68K_INTR_H_
                     30: #define _MVME68K_INTR_H_
                     31:
                     32: #include <machine/psl.h>
                     33:
                     34: #ifdef _KERNEL
                     35:
                     36: /*
                     37:  * Simulated software interrupt register.
                     38:  */
                     39: extern volatile u_int8_t ssir;
                     40:
                     41: #define        SIR_NET         0x01
                     42: #define        SIR_CLOCK       0x02
                     43:
                     44: #define        siron(mask)     \
                     45:        __asm __volatile ( "orb %1,%0" : "=m" (ssir) : "ir" (mask))
                     46: #define        siroff(mask)    \
                     47:        __asm __volatile ( "andb %1,%0" : "=m" (ssir) : "ir" (~(mask)))
                     48:
                     49: #define        setsoftint(s)   siron(s)
                     50: #define        setsoftnet()    siron(SIR_NET)
                     51: #define        setsoftclock()  siron(SIR_CLOCK)
                     52:
                     53: u_int8_t allocate_sir(void (*proc)(void *), void *arg);
                     54:
                     55: /*
                     56:  * Interrupt "levels".  These are a more abstract representation
                     57:  * of interrupt levels, and do not have the same meaning as m68k
                     58:  * CPU interrupt levels.  They serve two purposes:
                     59:  *
                     60:  *      - properly order ISRs in the list for that CPU ipl
                     61:  *      - compute CPU PSL values for the spl*() calls.
                     62:  */
                     63: #define IPL_NONE       0
                     64: #define IPL_SOFTNET    1
                     65: #define IPL_SOFTCLOCK  1
                     66: #define IPL_BIO                2
                     67: #define IPL_NET                3
                     68: #define IPL_TTY                3
                     69: #define IPL_CLOCK      5
                     70: #define IPL_STATCLOCK  5
                     71: #define IPL_HIGH       7
                     72:
                     73: #define        splsoft()               _splraise(PSL_S | PSL_IPL1)
                     74: #define        splsoftclock()          splsoft()
                     75: #define        splsoftnet()            splsoft()
                     76: #define        splbio()                _splraise(PSL_S | PSL_IPL2)
                     77: #define        splnet()                _splraise(PSL_S | PSL_IPL3)
                     78: #define        spltty()                _splraise(PSL_S | PSL_IPL3)
                     79: #define        splvm()                 _splraise(PSL_S | PSL_IPL3)
                     80: #define        splclock()              _splraise(PSL_S | PSL_IPL5)
                     81: #define        splstatclock()          _splraise(PSL_S | PSL_IPL5)
                     82: #define        splhigh()               _spl(PSL_S | PSL_IPL7)
                     83: #define        splsched()              splhigh()
                     84:
                     85: /* watch out for side effects */
                     86: #define        splx(s)                 ((s) & PSL_IPL ? _spl(s) : spl0())
                     87:
                     88: /* locore.s */
                     89: int    spl0(void);
                     90:
                     91: #endif /* _KERNEL */
                     92: #endif /* _MVME68K_INTR_H_ */