Annotation of sys/arch/mvme68k/dev/vme.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: vme.h,v 1.12 2005/11/24 22:43:16 miod Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 1995 Theo de Raadt
! 5: * All rights reserved.
! 6: *
! 7: * Redistribution and use in source and binary forms, with or without
! 8: * modification, are permitted provided that the following conditions
! 9: * are met:
! 10: * 1. Redistributions of source code must retain the above copyright
! 11: * notice, this list of conditions and the following disclaimer.
! 12: * 2. Redistributions in binary form must reproduce the above copyright
! 13: * notice, this list of conditions and the following disclaimer in the
! 14: * documentation and/or other materials provided with the distribution.
! 15: *
! 16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 17: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
! 18: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
! 19: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
! 20: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
! 21: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
! 22: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
! 23: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
! 24: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
! 25: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! 26: */
! 27:
! 28: struct vmesoftc {
! 29: struct device sc_dev;
! 30: vaddr_t sc_vaddr;
! 31: struct intrhand sc_abih; /* `abort' switch */
! 32: };
! 33:
! 34: struct vmessoftc {
! 35: struct device sc_dev;
! 36: struct vmesoftc *sc_vme;
! 37: };
! 38:
! 39: struct vmelsoftc {
! 40: struct device sc_dev;
! 41: struct vmesoftc *sc_vme;
! 42: };
! 43:
! 44: /*
! 45: * MVME147 vme configuration registers.
! 46: */
! 47: struct vme1reg {
! 48: /*01*/ volatile u_short vme1_scon;
! 49: #define VME1_SCON_SWITCH 0x01 /* SCON jumper is set */
! 50: #define VME1_SCON_SRESET 0x02 /* assert SRESET on bus */
! 51: #define VME1_SCON_SYSFAIL 0x04 /* assert SYSFAIL on bus */
! 52: #define VME1_SCON_ROBIN 0x08 /* round robin bus requests */
! 53: /*03*/ volatile u_short vme1_reqconf;
! 54: #define VME1_REQ_IPLMASK 0x03 /* interrupt level for requester */
! 55: #define VME1_REQ_RNEVER 0x08
! 56: #define VME1_REQ_RWD 0x10
! 57: #define VME1_REQ_DHB 0x40
! 58: #define VME1_REQ_DWB 0x80
! 59: /*05*/ volatile u_short vme1_masconf;
! 60: #define VME1_MAS_D16 0x01 /* force d8/16 accesses only */
! 61: #define VME1_MAS_MASA24 0x02 /* send address mod for A24 access */
! 62: #define VME1_MAS_MASA16 0x04 /* send address mod for A16 access */
! 63: #define VME1_MAS_MASUAT 0x08 /* handle unaligned VME cycles */
! 64: #define VME1_MAS_CFILL 0x10 /* DO NOT USE */
! 65: #define VME1_MAS_MASWP 0x20 /* VME fast mode (DO NOT USE) */
! 66: /*07*/ volatile u_short vme1_slconf;
! 67: #define VME1_SLAVE_SLVD16 0x01 /* DO NOT USE */
! 68: #define VME1_SLAVE_SLVWP 0x20 /* DO NOT USE */
! 69: #define VME1_SLAVE_SLVEN 0x80 /* allow access to onboard DRAM */
! 70: /*09*/ volatile u_short vme1_timerconf;
! 71: #define VME1_TIMER_LOCAL_MASK 0x03
! 72: #define VME1_TIMER_LOCAL_T0 0x00 /* local timeout 102 microsec */
! 73: #define VME1_TIMER_LOCAL_T1 0x01 /* local timeout 205 microsec */
! 74: #define VME1_TIMER_LOCAL_T2 0x02 /* local timeout 410 microsec */
! 75: #define VME1_TIMER_LOCAL_T3 0x03 /* local timeout disabled */
! 76: #define VME1_TIMER_VMEACC_MASK 0x0c
! 77: #define VME1_TIMER_VMEACC_T0 0x00 /* VME access timeout 102 microsec */
! 78: #define VME1_TIMER_VMEACC_T1 0x04 /* VME access timeout 1.6 millisec */
! 79: #define VME1_TIMER_VMEACC_T2 0x08 /* VME access timeout 51 millisec */
! 80: #define VME1_TIMER_VMEACC_T3 0x0c /* VME access timeout disabled */
! 81: #define VME1_TIMER_VMEGLO_MASK 0x30
! 82: #define VME1_TIMER_VMEGLO_T0 0x00 /* VME glob timeout 102 microsec */
! 83: #define VME1_TIMER_VMEGLO_T1 0x10 /* VME glob timeout 205 microsec */
! 84: #define VME1_TIMER_VMEGLO_T2 0x20 /* VME glob timeout 410 microsec */
! 85: #define VME1_TIMER_VMEGLO_T3 0x30 /* VME glob timeout disabled */
! 86: #define VME1_TIMER_ARBTO 0x40 /* enable VME arbitration timer */
! 87: /*0b*/ volatile u_short vme1_sladdrmod;
! 88: #define VME1_SLMOD_DATA 0x01
! 89: #define VME1_SLMOD_PRGRM 0x02
! 90: #define VME1_SLMOD_BLOCK 0x04
! 91: #define VME1_SLMOD_SHORT 0x08
! 92: #define VME1_SLMOD_STND 0x10
! 93: #define VME1_SLMOD_EXTED 0x20
! 94: #define VME1_SLMOD_USER 0x40
! 95: #define VME1_SLMOD_SUPER 0x80
! 96: /*0d*/ volatile u_short vme1_msaddrmod;
! 97: #define VME1_MSMOD_AM_MASK 0x3f
! 98: #define VME1_MSMOD_AMSEL 0x80
! 99: /*0f*/ volatile u_short vme1_irqen;
! 100: #define VME1_IRQ_VME(x) (1 << (x))
! 101: /*11*/ volatile u_short vme1_uirqen;
! 102: /*13*/ volatile u_short vme1_uirq;
! 103: /*15*/ volatile u_short vme1_irq;
! 104: /*17*/ volatile u_short vme1_vmeid;
! 105: /*19*/ volatile u_short vme1_buserr;
! 106: /*1b*/ volatile u_short vme1_gcsr;
! 107: #define VME1_GCSR_OFF 0x0f
! 108: /*1d*/ u_short :16;
! 109: /*1f*/ u_short :16;
! 110: /*21*/ volatile u_short vme1_gcsr_gr0;
! 111: /*23*/ volatile u_short vme1_gcsr_gr1;
! 112: /*25*/ volatile u_short vme1_gcsr_boardid;
! 113: /*27*/ volatile u_short vme1_gcsr_gpr0;
! 114: /*29*/ volatile u_short vme1_gcsr_gpr1;
! 115: /*2b*/ volatile u_short vme1_gcsr_gpr2;
! 116: /*2d*/ volatile u_short vme1_gcsr_gpr3;
! 117: /*2f*/ volatile u_short vme1_gcsr_gpr4;
! 118: };
! 119:
! 120: /*
! 121: * Basic VME memory layout for the MVME147 follows:
! 122: * - A32D32 accesses occur at memsize-0xefffffff. This makes it
! 123: * impossible to do A32D32 accesses before the end of your onboard
! 124: * memory. If you want to do low address A24D32 accesses, and you
! 125: * have 16M or more onboard memory you'll find you cannot.
! 126: * - A32D16 accesses can occur at 0xf0000000-0xff7fffff.
! 127: * - A16D16 accesses can occur at 0xffff0000-0xffffffff.
! 128: */
! 129: #define VME1_A32D32BASE 0x00000000UL
! 130: #define VME1_A32D32LEN 0xf0000000UL
! 131: #define VME1_A32D16BASE 0xf0000000UL
! 132: #define VME1_A32D16LEN 0x0f800000UL
! 133: #define VME1_A16D16BASE 0xffff0000UL
! 134: #define VME1_A16D16LEN 0x00010000UL
! 135: #define VME1_A16BASE 0xffff0000UL
! 136:
! 137: /*
! 138: * XXX: this chip has some rather insane access rules!
! 139: */
! 140: struct vme2reg {
! 141: /*00*/ volatile u_long vme2_slaveaddr1;
! 142: /*04*/ volatile u_long vme2_slaveaddr2;
! 143: #define VME2_SADDR_END 0xffff0000 /* VME address END & START */
! 144: #define VME2_SADDR_START 0x0000ffff
! 145: /*08*/ volatile u_long vme2_slavelmod1;
! 146: /*0c*/ volatile u_long vme2_slavelmod2;
! 147: #define VME2_SADDR_LADDR 0xffff0000 /* local base address */
! 148: #define VME2_SADDR_SIZE(mem) (0x1000 - (mem) >> 16) /* encoding of size */
! 149: /*10*/ volatile u_long vme2_slavectl;
! 150: #define VME2_SLAVE_CHOOSE(bits, num) ((bits) << (16*((num)-1)))
! 151: #define VME2_SLAVECTL_WP 0x00000100 /* write posting */
! 152: #define VME2_SLAVECTL_SNP_NO 0x00000000 /* no snooping */
! 153: #define VME2_SLAVECTL_SNP_SINK 0x00000200 /* sink data */
! 154: #define VME2_SLAVECTL_SNP_INVAL 0x00000400 /* invalidate */
! 155: #define VME2_SLAVECTL_ADDER 0x00000800 /* use adder */
! 156: #define VME2_SLAVECTL_SUP 0x00000080 /* modifier bit */
! 157: #define VME2_SLAVECTL_USR 0x00000040 /* modifier bit */
! 158: #define VME2_SLAVECTL_A32 0x00000020 /* modifier bit */
! 159: #define VME2_SLAVECTL_A24 0x00000010 /* modifier bit */
! 160: #define VME2_SLAVECTL_D64 0x00000008 /* modifier bit */
! 161: #define VME2_SLAVECTL_BLK 0x00000004 /* modifier bit */
! 162: #define VME2_SLAVECTL_PGM 0x00000002 /* modifier bit */
! 163: #define VME2_SLAVECTL_DAT 0x00000001 /* modifier bit */
! 164: /*14*/ volatile u_long vme2_master1;
! 165: /*18*/ volatile u_long vme2_master2;
! 166: /*1c*/ volatile u_long vme2_master3;
! 167: /*20*/ volatile u_long vme2_master4;
! 168: /*24*/ volatile u_long vme2_master4mod;
! 169: /*28*/ volatile u_long vme2_masterctl;
! 170: #define VME2_MASTERCTL_4SHIFT 24
! 171: #define VME2_MASTERCTL_3SHIFT 16
! 172: #define VME2_MASTERCTL_2SHIFT 8
! 173: #define VME2_MASTERCTL_1SHIFT 0
! 174: #define VME2_MASTERCTL_D16 0x80
! 175: #define VME2_MASTERCTL_WP 0x40
! 176: #define VME2_MASTERCTL_AM 0x3f
! 177: #define VME2_MASTERCTL_AM24SB 0x3f /* A24 Supervisory Block Transfer */
! 178: #define VME2_MASTERCTL_AM24SP 0x3e /* A24 Supervisory Program Access */
! 179: #define VME2_MASTERCTL_AM24SD 0x3d /* A24 Supervisory Data Access */
! 180: #define VME2_MASTERCTL_AM24UB 0x3b /* A24 Non-priv. Block Transfer */
! 181: #define VME2_MASTERCTL_AM24UP 0x3a /* A24 Non-priv. Program Access */
! 182: #define VME2_MASTERCTL_AM24UD 0x39 /* A24 Non-priv. Data Access */
! 183: #define VME2_MASTERCTL_AM16S 0x2d /* A16 Supervisory Access */
! 184: #define VME2_MASTERCTL_AM16U 0x29 /* A16 Non-priv. Access */
! 185: #define VME2_MASTERCTL_AM32SB 0x0f /* A32 Supervisory Block Transfer */
! 186: #define VME2_MASTERCTL_AM32SP 0x0e /* A32 Supervisory Program Access */
! 187: #define VME2_MASTERCTL_AM32SD 0x0d /* A32 Supervisory Data Access */
! 188: #define VME2_MASTERCTL_AM32UB 0x0b /* A32 Non-priv. Block Transfer */
! 189: #define VME2_MASTERCTL_AM32UP 0x0a /* A32 Non-priv. Program Access */
! 190: #define VME2_MASTERCTL_AM32UD 0x09 /* A32 Non-priv Data Access */
! 191:
! 192: #define VME2_MASTERCTL_ALL 0xff
! 193: /*2c*/ volatile u_long vme2_gcsrctl;
! 194: #define VME2_GCSRCTL_OFF 0xf0000000
! 195: #define VME2_GCSRCTL_MDEN4 0x00080000
! 196: #define VME2_GCSRCTL_MDEN3 0x00040000
! 197: #define VME2_GCSRCTL_MDEN2 0x00020000
! 198: #define VME2_GCSRCTL_MDEN1 0x00010000
! 199: #define VME2_GCSRCTL_I2EN 0x00008000 /* F decode (A24D16/A32D16) on */
! 200: #define VME2_GCSRCTL_I2WP 0x00004000 /* F decode write post */
! 201: #define VME2_GCSRCTL_I2SU 0x00002000 /* F decode is supervisor */
! 202: #define VME2_GCSRCTL_I2PD 0x00001000 /* F decode is program */
! 203: #define VME2_GCSRCTL_I1EN 0x00000800 /* short decode (A16Dx) on */
! 204: #define VME2_GCSRCTL_I1D16 0x00000400 /* short decode is D16 */
! 205: #define VME2_GCSRCTL_I1WP 0x00000200 /* short decode write post */
! 206: #define VME2_GCSRCTL_I1SU 0x00000100 /* short decode is supervisor */
! 207: #define VME2_GCSRCTL_ROMSIZE 0x000000c0 /* size of ROM */
! 208: #define VME2_GCSRCTL_ROMBSPD 0x00000038 /* speed of ROM */
! 209: #define VME2_GCSRCTL_ROMASPD 0x00000007 /* speed of ROM */
! 210: /*30*/ volatile u_long vme2_dmactl;
! 211: /*34*/ volatile u_long vme2_dmamode;
! 212: /*38*/ volatile u_long vme2_dmaladdr;
! 213: /*3c*/ volatile u_long vme2_dmavmeaddr;
! 214: /*40*/ volatile u_long vme2_dmacount;
! 215: /*44*/ volatile u_long vme2_dmatable;
! 216: /*48*/ volatile u_long vme2_dmastat;
! 217: /*4c*/ volatile u_long vme2_vmejunk;
! 218: /*50*/ volatile u_long vme2_t1cmp;
! 219: /*54*/ volatile u_long vme2_t1count;
! 220: /*58*/ volatile u_long vme2_t2cmp;
! 221: /*5c*/ volatile u_long vme2_t2count;
! 222: /*60*/ volatile u_long vme2_tctl;
! 223: #define VME2_TCTL_CEN 0x01
! 224: #define VME2_TCTL_COC 0x02
! 225: #define VME2_TCTL_COVF 0x04
! 226: #define VME2_TCTL_OVF 0xf0
! 227: #define VME2_TCTL_SCON 0x40000000 /* we are SCON */
! 228: #define VME2_TCTL_SYSFAIL 0x20000000 /* light SYSFAIL led */
! 229: #define VME2_TCTL_SRST 0x00800000 /* system reset */
! 230: /*64*/ volatile u_long vme2_prescale;
! 231: /*68*/ volatile u_long vme2_irqstat;
! 232: /*6c*/ volatile u_long vme2_irqen;
! 233: /*70*/ volatile u_long vme2_setsoftirq; /* VME2_IRQ_SWx only */
! 234: /*74*/ volatile u_long vme2_irqclr; /* except VME2_IRQ_VMEx */
! 235: #define VME2_IRQ_ACF 0x80000000
! 236: #define VME2_IRQ_AB 0x40000000
! 237: #define VME2_IRQ_SYSF 0x20000000
! 238: #define VME2_IRQ_MWP 0x10000000
! 239: #define VME2_IRQ_PE 0x08000000
! 240: #define VME2_IRQ_V1IE 0x04000000
! 241: #define VME2_IRQ_TIC2 0x02000000
! 242: #define VME2_IRQ_TIC1 0x01000000
! 243: #define VME2_IRQ_VIA 0x00800000
! 244: #define VME2_IRQ_DMA 0x00400000
! 245: #define VME2_IRQ_SIG3 0x00200000
! 246: #define VME2_IRQ_SIG2 0x00100000
! 247: #define VME2_IRQ_SIG1 0x00080000
! 248: #define VME2_IRQ_SIG0 0x00040000
! 249: #define VME2_IRQ_LM1 0x00020000
! 250: #define VME2_IRQ_LM0 0x00010000
! 251: #define VME2_IRQ_SW7 0x00008000
! 252: #define VME2_IRQ_SW6 0x00004000
! 253: #define VME2_IRQ_SW5 0x00002000
! 254: #define VME2_IRQ_SW4 0x00001000
! 255: #define VME2_IRQ_SW3 0x00000800
! 256: #define VME2_IRQ_SW2 0x00000400
! 257: #define VME2_IRQ_SW1 0x00000200
! 258: #define VME2_IRQ_SW0 0x00000100
! 259: #define VME2_IRQ_SPARE 0x00000080
! 260: #define VME2_IRQ_VME7 0x00000040
! 261: #define VME2_IRQ_VME6 0x00000020
! 262: #define VME2_IRQ_VME5 0x00000010
! 263: #define VME2_IRQ_VME4 0x00000008
! 264: #define VME2_IRQ_VME3 0x00000004
! 265: #define VME2_IRQ_VME2 0x00000002
! 266: #define VME2_IRQ_VME1 0x00000001
! 267: #define VME2_IRQ_VME(x) (1 << ((x) - 1))
! 268: /*78*/ volatile u_long vme2_irql1;
! 269: #define VME2_IRQL1_ACFSHIFT 28
! 270: #define VME2_IRQL1_ABSHIFT 24
! 271: #define VME2_IRQL1_SYSFSHIFT 20
! 272: #define VME2_IRQL1_WPESHIFT 16
! 273: #define VME2_IRQL1_PESHIFT 12
! 274: #define VME2_IRQL1_V1IESHIFT 8
! 275: #define VME2_IRQL1_TIC2SHIFT 4
! 276: #define VME2_IRQL1_TIC1SHIFT 0
! 277: /*7c*/ volatile u_long vme2_irql2;
! 278: #define VME2_IRQL2_VIASHIFT 28
! 279: #define VME2_IRQL2_DMASHIFT 24
! 280: #define VME2_IRQL2_SIG3SHIFT 20
! 281: #define VME2_IRQL2_SIG2SHIFT 16
! 282: #define VME2_IRQL2_SIG1SHIFT 12
! 283: #define VME2_IRQL2_SIG0SHIFT 8
! 284: #define VME2_IRQL2_LM1SHIFT 4
! 285: #define VME2_IRQL2_LM0SHIFT 0
! 286: /*80*/ volatile u_long vme2_irql3;
! 287: #define VME2_IRQL3_SW7SHIFT 28
! 288: #define VME2_IRQL3_SW6SHIFT 24
! 289: #define VME2_IRQL3_SW5SHIFT 20
! 290: #define VME2_IRQL3_SW4SHIFT 16
! 291: #define VME2_IRQL3_SW3SHIFT 12
! 292: #define VME2_IRQL3_SW2SHIFT 8
! 293: #define VME2_IRQL3_SW1SHIFT 4
! 294: #define VME2_IRQL3_SW0SHIFT 0
! 295: /*84*/ volatile u_long vme2_irql4;
! 296: #define VME2_IRQL4_SPARESHIFT 28
! 297: #define VME2_IRQL4_VME7SHIFT 24
! 298: #define VME2_IRQL4_VME6SHIFT 20
! 299: #define VME2_IRQL4_VME5SHIFT 16
! 300: #define VME2_IRQL4_VME4SHIFT 12
! 301: #define VME2_IRQL4_VME3SHIFT 8
! 302: #define VME2_IRQL4_VME2SHIFT 4
! 303: #define VME2_IRQL4_VME1SHIFT 0
! 304: /*88*/ volatile u_long vme2_vbr;
! 305: #define VME2_VBR_0SHIFT 28
! 306: #define VME2_VBR_1SHIFT 24
! 307: #define VME2_VBR_GPOXXXX 0x00ffffff
! 308: /*8c*/ volatile u_long vme2_misc;
! 309: #define VME2_MISC_MPIRQEN 0x00000080 /* do not set */
! 310: #define VME2_MISC_REVEROM 0x00000040 /* 167: dis eprom. 166: en flash */
! 311: #define VME2_MISC_DISSRAM 0x00000020 /* do not set */
! 312: #define VME2_MISC_DISMST 0x00000010
! 313: #define VME2_MISC_NOELBBSY 0x00000008 /* do not set */
! 314: #define VME2_MISC_DISBSYT 0x00000004 /* do not set */
! 315: #define VME2_MISC_ENINT 0x00000002 /* do not set */
! 316: #define VME2_MISC_DISBGN 0x00000001 /* do not set */
! 317: };
! 318:
! 319: #define VME2_A16D32BASE 0xffff0000UL
! 320: #define VME2_A16D32LEN 0x00010000UL
! 321: #define VME2_A32D16BASE 0xf1000000UL
! 322: #define VME2_A32D16LEN 0x01000000UL
! 323: #define VME2_A16D16BASE 0xffff0000UL
! 324: #define VME2_A16D16LEN 0x00010000UL
! 325: #define VME2_A24D16BASE 0xf0000000UL
! 326: #define VME2_A24D16LEN 0x01000000UL
! 327: #define VME2_A16BASE 0xffff0000UL
! 328: #define VME2_A24BASE 0xff000000UL
! 329:
! 330: paddr_t vmepmap(struct vmesoftc *sc, paddr_t vmeaddr, int len, int bustype);
! 331: vaddr_t vmemap(struct vmesoftc *sc, paddr_t vmeaddr, int len, int bustype);
! 332: int vmerw(struct vmesoftc *sc, struct uio *uio, int flags, int bus);
! 333:
! 334: int vmeintr_establish(int, struct intrhand *, const char *);
! 335: int vmescan(struct device *, void *, void *, int);
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