Annotation of sys/arch/mvme68k/dev/sbicvar.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: sbicvar.h,v 1.7 2004/07/02 17:57:29 miod Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 1990 The Regents of the University of California.
! 5: * All rights reserved.
! 6: *
! 7: * This code is derived from software contributed to Berkeley by
! 8: * Van Jacobson of Lawrence Berkeley Laboratory.
! 9: *
! 10: * Redistribution and use in source and binary forms, with or without
! 11: * modification, are permitted provided that the following conditions
! 12: * are met:
! 13: * 1. Redistributions of source code must retain the above copyright
! 14: * notice, this list of conditions and the following disclaimer.
! 15: * 2. Redistributions in binary form must reproduce the above copyright
! 16: * notice, this list of conditions and the following disclaimer in the
! 17: * documentation and/or other materials provided with the distribution.
! 18: * 3. Neither the name of the University nor the names of its contributors
! 19: * may be used to endorse or promote products derived from this software
! 20: * without specific prior written permission.
! 21: *
! 22: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
! 23: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! 24: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 25: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
! 26: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 27: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 28: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 29: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 30: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 31: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 32: * SUCH DAMAGE.
! 33: *
! 34: * @(#)scsivar.h 7.1 (Berkeley) 5/8/90
! 35: */
! 36: #ifndef _SBICVAR_H_
! 37: #define _SBICVAR_H_
! 38: #include <sys/malloc.h>
! 39:
! 40:
! 41: /*
! 42: * DMA chains are used for Scatter-Gather DMA.
! 43: */
! 44: struct dma_chain {
! 45: int dc_count;
! 46: char *dc_addr;
! 47: };
! 48:
! 49: /*
! 50: * ACB. Holds additional information for each SCSI command Comments: We
! 51: * need a separate scsi command block because we may need to overwrite it
! 52: * with a request sense command. Basicly, we refrain from fiddling with
! 53: * the scsi_xfer struct (except do the expected updating of return values).
! 54: * We'll generally update: xs->{flags,resid,error,sense,status} and
! 55: * occasionally xs->retries.
! 56: */
! 57: struct sbic_acb {
! 58: TAILQ_ENTRY(sbic_acb) chain;
! 59: struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */
! 60: int flags; /* Status */
! 61: #define ACB_FREE 0x00
! 62: #define ACB_ACTIVE 0x01
! 63: #define ACB_DONE 0x04
! 64: #define ACB_CHKSENSE 0x08
! 65: #define ACB_BBUF 0x10 /* DMA input needs to be copied from bounce */
! 66: #define ACB_DATAIN 0x20 /* DMA direction flag */
! 67:
! 68: struct scsi_generic cmd; /* SCSI command block */
! 69: int clen;
! 70: struct dma_chain sc_kv; /* Virtual address of whole DMA */
! 71: struct dma_chain sc_pa; /* Physical address of DMA segment */
! 72: u_long sc_tcnt; /* number of bytes for this DMA */
! 73: u_short sc_dmacmd; /* Internal data for this DMA */
! 74: char *pa_addr; /* XXXX initial phys addr */
! 75: };
! 76:
! 77: /*
! 78: * Some info about each (possible) target on the SCSI bus. This should
! 79: * probably have been a "per target+lunit" structure, but we'll leave it at
! 80: * this for now. Is there a way to reliably hook it up to sc->fordriver??
! 81: */
! 82: struct sbic_tinfo {
! 83: int cmds; /* #commands processed */
! 84: int dconns; /* #disconnects */
! 85: int senses; /* #request sense commands sent */
! 86: int lubusy; /* What local units/subr. are busy? */
! 87: } tinfo_t;
! 88:
! 89: struct sbic_softc {
! 90: struct device sc_dev;
! 91: struct intrhand sc_dmaih;
! 92: struct intrhand sc_sbicih;
! 93: struct target_sync {
! 94: u_char state;
! 95: u_char period;
! 96: u_char offset;
! 97: } sc_sync[8];
! 98: u_char target; /* Currently active target */
! 99: u_char lun;
! 100: struct scsi_link sc_link; /* proto for sub devices */
! 101: sbic_regmap_p sc_sbicp; /* the SBIC */
! 102: int sc_ipl;
! 103:
! 104: /* Lists of command blocks */
! 105: TAILQ_HEAD(acb_list, sbic_acb) free_list,
! 106: ready_list,
! 107: nexus_list;
! 108:
! 109: struct sbic_acb *sc_nexus; /* current command */
! 110: struct sbic_acb sc_acb[8]; /* the real command blocks */
! 111: struct sbic_tinfo sc_tinfo[8];
! 112:
! 113: struct scsi_xfer *sc_xs; /* transfer from high level code */
! 114: u_char sc_flags;
! 115: u_char sc_stat[2];
! 116: u_char sc_msg[7];
! 117: u_long sc_clkfreq;
! 118: u_long sc_tcnt; /* number of bytes transferred */
! 119: u_short sc_dmacmd; /* used by dma drivers */
! 120: u_long sc_dmamask; /* dma valid mem mask */
! 121: #ifdef DEBUG
! 122: u_short sc_dmatimo; /* dma timeout */
! 123: #endif
! 124: struct dma_chain *sc_cur;
! 125: struct dma_chain *sc_last;
! 126: int (*sc_dmago)(struct sbic_softc *, char *, int, int);
! 127: int (*sc_dmanext)(struct sbic_softc *);
! 128: void (*sc_enintr)(struct sbic_softc *);
! 129: void (*sc_dmastop)(struct sbic_softc *);
! 130: };
! 131:
! 132: /*
! 133: * sc_flags
! 134: */
! 135: #define SBICF_ALIVE 0x01 /* controller initialized */
! 136: #define SBICF_DCFLUSH 0x02 /* need flush for overlap after dma finishes */
! 137: #define SBICF_SELECTED 0x04 /* bus is in selected state. */
! 138: #define SBICF_ICMD 0x08 /* Immediate command in execution */
! 139: #define SBICF_BADDMA 0x10 /* controller can only DMA to ztwobus space */
! 140: #define SBICF_INTR 0x40 /* SBICF interrupt expected */
! 141: #define SBICF_INDMA 0x80 /* not used yet, DMA I/O in progress */
! 142:
! 143: /*
! 144: * sync states
! 145: */
! 146: #define SYNC_START 0 /* no sync handshake started */
! 147: #define SYNC_SENT 1 /* we sent sync request, no answer yet */
! 148: #define SYNC_DONE 2 /* target accepted our (or inferior) settings,
! 149: or it rejected the request and we stay async */
! 150:
! 151: #define PHASE 0x07 /* mask for psns/pctl phase */
! 152: #define DATA_OUT_PHASE 0x00
! 153: #define DATA_IN_PHASE 0x01
! 154: #define CMD_PHASE 0x02
! 155: #define STATUS_PHASE 0x03
! 156: #define BUS_FREE_PHASE 0x04
! 157: #define ARB_SEL_PHASE 0x05 /* Fuji chip combines arbitration with sel. */
! 158: #define MESG_OUT_PHASE 0x06
! 159: #define MESG_IN_PHASE 0x07
! 160:
! 161: #define MSG_CMD_COMPLETE 0x00
! 162: #define MSG_EXT_MESSAGE 0x01
! 163: #define MSG_SAVE_DATA_PTR 0x02
! 164: #define MSG_RESTORE_PTR 0x03
! 165: #define MSG_DISCONNECT 0x04
! 166: #define MSG_INIT_DETECT_ERROR 0x05
! 167: #define MSG_ABORT 0x06
! 168: #define MSG_REJECT 0x07
! 169: #define MSG_NOOP 0x08
! 170: #define MSG_PARITY_ERROR 0x09
! 171: #define MSG_BUS_DEVICE_RESET 0x0C
! 172: #define MSG_IDENTIFY 0x80
! 173: #define MSG_IDENTIFY_DR 0xc0 /* (disconnect/reconnect allowed) */
! 174: #define MSG_SYNC_REQ 0x01
! 175:
! 176: #define MSG_ISIDENTIFY(x) ((x) & MSG_IDENTIFY)
! 177:
! 178:
! 179: #define STS_CHECKCOND 0x02 /* Check Condition (ie., read sense) */
! 180: #define STS_CONDMET 0x04 /* Condition Met (ie., search worked) */
! 181: #define STS_BUSY 0x08
! 182: #define STS_INTERMED 0x10 /* Intermediate status sent */
! 183: #define STS_EXT 0x80 /* Extended status valid */
! 184:
! 185:
! 186: /*
! 187: * States returned by our state machine
! 188: */
! 189:
! 190: #define SBIC_STATE_ERROR -1
! 191: #define SBIC_STATE_DONE 0
! 192: #define SBIC_STATE_RUNNING 1
! 193: #define SBIC_STATE_DISCONNECT 2
! 194:
! 195:
! 196: struct buf;
! 197: struct scsi_xfer;
! 198:
! 199: void sbic_minphys(struct buf *bp);
! 200: int sbic_scsicmd(struct scsi_xfer *);
! 201:
! 202: #endif /* _SBICVAR_H_ */
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