Annotation of sys/arch/mips64/include/pte.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: pte.h,v 1.5 2007/04/27 18:15:55 miod Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 1988 University of Utah.
! 5: * Copyright (c) 1992, 1993
! 6: * The Regents of the University of California. All rights reserved.
! 7: *
! 8: * This code is derived from software contributed to Berkeley by
! 9: * the Systems Programming Group of the University of Utah Computer
! 10: * Science Department and Ralph Campbell.
! 11: *
! 12: * Redistribution and use in source and binary forms, with or without
! 13: * modification, are permitted provided that the following conditions
! 14: * are met:
! 15: * 1. Redistributions of source code must retain the above copyright
! 16: * notice, this list of conditions and the following disclaimer.
! 17: * 2. Redistributions in binary form must reproduce the above copyright
! 18: * notice, this list of conditions and the following disclaimer in the
! 19: * documentation and/or other materials provided with the distribution.
! 20: * 3. Neither the name of the University nor the names of its contributors
! 21: * may be used to endorse or promote products derived from this software
! 22: * without specific prior written permission.
! 23: *
! 24: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
! 25: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! 26: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 27: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
! 28: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 29: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 30: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 31: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 32: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 33: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 34: * SUCH DAMAGE.
! 35: *
! 36: * from: Utah Hdr: pte.h 1.11 89/09/03
! 37: * from: @(#)pte.h 8.1 (Berkeley) 6/10/93
! 38: */
! 39:
! 40: /*
! 41: * R4000 hardware page table entry
! 42: */
! 43:
! 44: #ifndef _LOCORE
! 45:
! 46: /*
! 47: * Structure defining an tlb entry data set.
! 48: */
! 49:
! 50: struct tlb_entry {
! 51: u_int64_t tlb_mask;
! 52: u_int64_t tlb_hi;
! 53: u_int64_t tlb_lo0;
! 54: u_int64_t tlb_lo1;
! 55: };
! 56:
! 57: typedef union pt_entry {
! 58: unsigned int pt_entry; /* for copying, etc. */
! 59: unsigned int pt_pte; /* XXX void */
! 60: } pt_entry_t; /* Mips page table entry */
! 61: #endif /* _LOCORE */
! 62:
! 63: #define PT_ENTRY_NULL ((pt_entry_t *) 0)
! 64:
! 65: #define PG_RO 0x40000000 /* SW */
! 66:
! 67: #define PG_SVPN 0xfffff000 /* Software page no mask */
! 68: #define PG_HVPN 0xffffe000 /* Hardware page no mask */
! 69: #define PG_ODDPG 0x00001000 /* Odd even pte entry */
! 70: #define PG_ASID 0x000000ff /* Address space ID */
! 71: #define PG_G 0x00000001 /* HW */
! 72: #define PG_V 0x00000002
! 73: #define PG_NV 0x00000000
! 74: #define PG_M 0x00000004
! 75: #define PG_ATTR 0x0000003f
! 76: #define PG_UNCACHED 0x00000010
! 77: #define PG_CACHED_NC 0x00000018 /* Cached, non coherent */
! 78: #define PG_CACHED_CE 0x00000020 /* Cached, coherent exclusive */
! 79: #define PG_CACHED_CEW 0x00000028 /* Cached, coherent exclusive write */
! 80: #define PG_CACHEMODE 0x00000038
! 81: #ifdef TGT_COHERENT
! 82: #define PG_CACHED PG_CACHED_CE
! 83: #else
! 84: #define PG_CACHED PG_CACHED_NC
! 85: #endif
! 86: #define PG_ROPAGE (PG_V | PG_RO | PG_CACHED) /* Write protected */
! 87: #define PG_RWPAGE (PG_V | PG_M | PG_CACHED) /* Not w-prot not clean */
! 88: #define PG_CWPAGE (PG_V | PG_CACHED) /* Not w-prot but clean */
! 89: #define PG_IOPAGE (PG_G | PG_V | PG_M | PG_UNCACHED)
! 90: #define PG_FRAME 0x3fffffc0
! 91: #define PG_SHIFT 6
! 92:
! 93: #define pfn_to_pad(x) (((vaddr_t)(x) & PG_FRAME) << PG_SHIFT)
! 94: #define vad_to_pfn(x) (((vaddr_t)(x) >> PG_SHIFT) & PG_FRAME)
! 95: /* User virtual to pte page entry */
! 96: #define uvtopte(adr) (((adr) >> PGSHIFT) & (NPTEPG -1))
! 97:
! 98: #define PG_SIZE_4K 0x00000000
! 99: #define PG_SIZE_16K 0x00006000
! 100: #define PG_SIZE_64K 0x0001e000
! 101: #define PG_SIZE_256K 0x0007e000
! 102: #define PG_SIZE_1M 0x001fe000
! 103: #define PG_SIZE_4M 0x007fe000
! 104: #define PG_SIZE_16M 0x01ffe000
! 105:
! 106: #if defined(_KERNEL) && !defined(_LOCORE)
! 107:
! 108: /*
! 109: * Kernel virtual address to page table entry and visa versa.
! 110: */
! 111: #define kvtopte(va) \
! 112: (Sysmap + (((vaddr_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
! 113:
! 114: extern pt_entry_t *Sysmap; /* kernel pte table */
! 115: extern u_int Sysmapsize; /* number of pte's in Sysmap */
! 116: #endif
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