File: [local] / sys / arch / mips64 / include / exception.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:07:31 2008 UTC (16 years, 5 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
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/* $OpenBSD: exception.h,v 1.5 2007/04/24 16:47:34 miod Exp $ */
/*
* Copyright (c) 1998-2003 Opsycon AB (www.opsycon.se)
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
/*
* Definitions for exception processing.
*/
#ifndef _MIPS_EXCEPTION_H_
#define _MIPS_EXCEPTION_H_
/*
* Exception codes.
*/
#define EX_INT 0 /* Interrupt */
#define EX_MOD 1 /* TLB Modification */
#define EX_TLBL 2 /* TLB exception, load or i-fetch */
#define EX_TLBS 3 /* TLB exception, store */
#define EX_ADEL 4 /* Address error exception, load or i-fetch */
#define EX_ADES 5 /* Address error exception, store */
#define EX_IBE 6 /* Bus error exception, i-fetch */
#define EX_DBE 7 /* Bus error exception, data reference */
#define EX_SYS 8 /* Syscall exception */
#define EX_BP 9 /* Breakpoint exception */
#define EX_RI 10 /* Reserved instruction exception */
#define EX_CPU 11 /* Coprocessor unusable exception */
#define EX_OV 12 /* Arithmetic overflow exception */
#define EX_TR 13 /* Trap exception */
#define EX_VCEI 14 /* Virtual coherency exception instruction */
#define EX_FPE 15 /* Floating point exception */
#define EX_WATCH 23 /* Reference to watch/hi/watch/lo address */
#define EX_VCED 31 /* Virtual coherency exception data */
#define EX_U 32 /* Exception from user mode (SW flag) */
#if defined(DDB) || defined(DEBUG)
#define EX_SIZE 10
struct ex_debug {
u_int ex_status;
u_int ex_cause;
u_int ex_badaddr;
u_int ex_pc;
u_int ex_ra;
u_int ex_sp;
u_int ex_code;
} ex_debug[EX_SIZE], *exp = ex_debug;
#endif
#endif /* !_MIPS_EXCEPTION_H_ */