File: [local] / sys / arch / macppc / pci / pcibrvar.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:07:18 2008 UTC (16 years, 4 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
|
/* $OpenBSD: pcibrvar.h,v 1.6 2003/06/09 16:10:04 deraadt Exp $ */
/*
* Copyright (c) 1997 Per Fogelstrom
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcidevs.h>
struct pcibr_config {
bus_space_tag_t lc_memt;
bus_space_tag_t lc_iot;
bus_space_handle_t ioh_cf8;
bus_space_handle_t ioh_cfc;
struct ppc_pci_chipset lc_pc;
int config_type;
int bus;
int pci_init_done;
int node;
};
struct pcibr_softc {
struct device sc_dev;
struct pcibr_config *sc_pcibr;
struct ppc_bus_space sc_membus_space;
struct ppc_bus_space sc_iobus_space;
struct powerpc_bus_dma_tag sc_dmatag;
struct pcibr_config pcibr_config;
struct extent *extent_mem;
struct extent *extent_port;
u_int32_t mem_alloc_start;
u_int32_t port_alloc_start;
int nbogus;
};
struct pci_reserve_mem {
bus_addr_t start;
bus_size_t size;
char *name;
};
void pci_addr_fixup(struct pcibr_softc *, pci_chipset_tag_t, int);
#define PCIADDR_SEARCH_IO 0
#define PCIADDR_SEARCH_MEM 1
struct extent * pciaddr_search(int mem_port, struct device *,
bus_addr_t *startp, bus_size_t size);