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Annotation of sys/arch/macppc/include/z8530var.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $NetBSD: z8530var.h,v 1.5 2002/03/17 19:40:45 atatat Exp $      */
                      2:
                      3: /*
                      4:  * Copyright (c) 1994 Gordon W. Ross
                      5:  * Copyright (c) 1992, 1993
                      6:  *     The Regents of the University of California.  All rights reserved.
                      7:  *
                      8:  * This software was developed by the Computer Systems Engineering group
                      9:  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
                     10:  * contributed to Berkeley.
                     11:  *
                     12:  * All advertising materials mentioning features or use of this software
                     13:  * must display the following acknowledgement:
                     14:  *     This product includes software developed by the University of
                     15:  *     California, Lawrence Berkeley Laboratory.
                     16:  *
                     17:  * Redistribution and use in source and binary forms, with or without
                     18:  * modification, are permitted provided that the following conditions
                     19:  * are met:
                     20:  * 1. Redistributions of source code must retain the above copyright
                     21:  *    notice, this list of conditions and the following disclaimer.
                     22:  * 2. Redistributions in binary form must reproduce the above copyright
                     23:  *    notice, this list of conditions and the following disclaimer in the
                     24:  *    documentation and/or other materials provided with the distribution.
                     25:  * 3. Neither the name of the University nor the names of its contributors
                     26:  *    may be used to endorse or promote products derived from this software
                     27:  *    without specific prior written permission.
                     28:  *
                     29:  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
                     30:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
                     31:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
                     32:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
                     33:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
                     34:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
                     35:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
                     36:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
                     37:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
                     38:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
                     39:  * SUCH DAMAGE.
                     40:  *
                     41:  *     @(#)zsvar.h     8.1 (Berkeley) 6/11/93
                     42:  */
                     43:
                     44: #include <macppc/dev/z8530sc.h>
                     45: #include <macppc/dev/dbdma.h>
                     46:
                     47: /*
                     48:  * Clock source info structure, added here so xzs_chanstate works
                     49:  */
                     50: struct zsclksrc {
                     51:        long    clk;    /* clock rate, in MHz, present on signal line */
                     52:        int     flags;  /* Specifies how this source can be used
                     53:                           (RTxC divided, RTxC BRG, PCLK BRG, TRxC divided)
                     54:                           and also if the source is "external" and if it
                     55:                           is changeable (by an ioctl ex.). The
                     56:                           source usage flags are used by the tty
                     57:                           child. The other bits tell zsloadchannelregs
                     58:                           if it should call an md signal source
                     59:                           changing routine. ZSC_VARIABLE says if
                     60:                           an ioctl should be able to cahnge the
                     61:                           clock rate.*/
                     62: };
                     63: #define ZSC_PCLK        0x01
                     64: #define ZSC_RTXBRG      0x02
                     65: #define ZSC_RTXDIV      0x04
                     66: #define ZSC_TRXDIV      0x08
                     67: #define ZSC_VARIABLE    0x40
                     68: #define ZSC_EXTERN      0x80
                     69:
                     70: #define ZSC_BRG         0x03
                     71: #define ZSC_DIV         0x0c
                     72:
                     73:
                     74: /*
                     75:  * These are the machine-dependent (extended) variants of
                     76:  * struct zs_chanstate and struct zsc_softc
                     77:  */
                     78: struct xzs_chanstate {
                     79:        /* machine-independent part (First!)*/
                     80:        struct zs_chanstate xzs_cs;
                     81:        /* machine-dependent extensions */
                     82:        int cs_hwflags;
                     83:        int     cs_chip;                /* type of chip */
                     84:        /* Clock source info... */
                     85:        int     cs_clock_count;         /* how many signal sources available */
                     86:        struct zsclksrc cs_clocks[4];   /* info on available signal sources */
                     87:        long    cs_cclk_flag;           /* flag for current clock source */
                     88:        long    cs_pclk_flag;           /* flag for pending clock source */
                     89:        int     cs_csource;             /* current source # */
                     90:        int     cs_psource;             /* pending source # */
                     91: };
                     92:
                     93: struct zsc_softc {
                     94:        struct  device zsc_dev;         /* required first: base device */
                     95:        struct  zs_chanstate *zsc_cs[2];        /* channel A and B soft state */
                     96:        /* Machine-dependent part follows... */
                     97:        struct xzs_chanstate xzsc_xcs_store[2];
                     98:        dbdma_regmap_t *zsc_txdmareg[2];
                     99:        dbdma_command_t *zsc_txdmacmd[2];
                    100:        /* XXX tx only, for now */
                    101: };
                    102:
                    103: /*
                    104:  * Functions to read and write individual registers in a channel.
                    105:  * The ZS chip requires a 1.6 uSec. recovery time between accesses,
                    106:  * and the Sun3 hardware does NOT take care of this for you.
                    107:  * MacII hardware DOES dake care of the delay for us. :-)
                    108:  * XXX - Then these should be inline functions! -gwr
                    109:  * Some clock-chirped macs lose serial ports. It could be that the
                    110:  * hardware delay is tied to the CPU speed, and that the minimum delay
                    111:  * no longer's respected. For them, ZS_DELAY might help.
                    112:  * XXX - no one seems to want to try and check this -wrs
                    113:  */
                    114:
                    115: u_char zs_read_reg(struct zs_chanstate *cs, u_char reg);
                    116: u_char zs_read_csr(struct zs_chanstate *cs);
                    117: u_char zs_read_data(struct zs_chanstate *cs);
                    118:
                    119: void  zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val);
                    120: void  zs_write_csr(struct zs_chanstate *cs, u_char val);
                    121: void  zs_write_data(struct zs_chanstate *cs, u_char val);
                    122:
                    123: /* XXX - Could define splzs() here instead of in psl.h */
                    124: #define splzs spltty
                    125:
                    126: /* Hook for MD ioctl support */
                    127: int    zsmdioctl(struct zs_chanstate *cs, u_long cmd, caddr_t data);
                    128: /* XXX - This is a bit gross... */
                    129: /*
                    130: #define ZS_MD_IOCTL(cs, cmd, data) zsmdioctl(cs, cmd, data)
                    131: */
                    132:
                    133: /* Callback for "external" clock sources */
                    134: void zsmd_setclock(struct zs_chanstate *cs);
                    135: #define ZS_MD_SETCLK(cs) zsmd_setclock(cs)
                    136:
                    137: #define PCLK   (9600 * 384)    /* PCLK pin input clock rate */
                    138:
                    139: /* The layout of this is hardware-dependent (padding, order). */
                    140: struct zschan {
                    141:        volatile u_char zc_csr;         /* ctrl,status, and indirect access */
                    142:        u_char          zc_xxx0[15];
                    143:        volatile u_char zc_data;        /* data */
                    144:        u_char          zc_xxx1[15];
                    145: };
                    146: void   zs_kgdb_init (void);
                    147:
                    148: #ifndef ZSCCF_CHANNEL
                    149: #define ZSCCF_CHANNEL 0
                    150: #define ZSCCF_CHANNEL_DEFAULT -1
                    151: #endif

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