Annotation of sys/arch/macppc/dev/viareg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: viareg.h,v 1.4 2002/06/07 07:14:48 miod Exp $ */
2: /* $NetBSD: viareg.h,v 1.2 1998/10/20 14:56:30 tsubai Exp $ */
3:
4: /*-
5: * Copyright (C) 1993 Allen K. Briggs, Chris P. Caputo,
6: * Michael L. Finch, Bradley A. Grantham, and
7: * Lawrence A. Kesteloot
8: * All rights reserved.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by the Alice Group.
21: * 4. The names of the Alice Group or any of its members may not be used
22: * to endorse or promote products derived from this software without
23: * specific prior written permission.
24: *
25: * THIS SOFTWARE IS PROVIDED BY THE ALICE GROUP ``AS IS'' AND ANY EXPRESS OR
26: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28: * IN NO EVENT SHALL THE ALICE GROUP BE LIABLE FOR ANY DIRECT, INDIRECT,
29: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34: * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35: *
36: */
37: /*
38:
39: Prototype VIA control definitions
40:
41: 06/04/92,22:33:57 BG Let's see what I can do.
42:
43: */
44:
45: extern volatile unsigned char *Via1Base;
46: #define VIA1_addr Via1Base /* at PA 0x50f00000 */
47:
48: #define VIA1 0
49: #define VIA2 0
50:
51: /* VIA interface registers */
52: #define vBufA 0x1e00 /* register A */
53: #define vBufB 0 /* register B */
54: #define vDirA 0x0600 /* data direction register */
55: #define vDirB 0x0400 /* data direction register */
56: #define vT1C 0x0800
57: #define vT1CH 0x0a00
58: #define vT1L 0x0c00
59: #define vT1LH 0x0e00
60: #define vT2C 0x1000
61: #define vT2CH 0x1200
62: #define vSR 0x1400 /* shift register */
63: #define vACR 0x1600 /* aux control register */
64: #define vIFR 0x1a00 /* interrupt flag register */
65: #define vIER 0x1c00 /* interrupt enable register */
66:
67: #define via_reg(v, r) (*(Via1Base + (r)))
68:
69: #include <machine/pio.h>
70:
71: static __inline void
72: via_reg_and(int ign, int reg, int val)
73: {
74: volatile unsigned char *addr = Via1Base + reg;
75:
76: out8(addr, in8(addr) & val);
77: }
78:
79: static __inline void
80: via_reg_or(int ign, int reg, int val)
81: {
82: volatile unsigned char *addr = Via1Base + reg;
83:
84: out8(addr, in8(addr) | val);
85: }
86:
87: static __inline void
88: via_reg_xor(int ign, int reg, int val)
89: {
90: volatile unsigned char *addr = Via1Base + reg;
91:
92: out8(addr, in8(addr) ^ val);
93: }
94:
95: static __inline int
96: read_via_reg(int ign, int reg)
97: {
98: volatile unsigned char *addr = Via1Base + reg;
99:
100: return in8(addr);
101: }
102:
103: static __inline void
104: write_via_reg(int ign, int reg, int val)
105: {
106: volatile unsigned char *addr = Via1Base + reg;
107:
108: out8(addr, val);
109: }
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