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Annotation of sys/arch/macppc/dev/i2sreg.h, Revision 1.1

1.1     ! nbrk        1: /* $OpenBSD: i2sreg.h,v 1.2 2007/04/21 15:48:22 gwk Exp $ */
        !             2: /*-
        !             3:  * Copyright (c) 2002 Tsubai Masanari.  All rights reserved.
        !             4:  *
        !             5:  * Redistribution and use in source and binary forms, with or without
        !             6:  * modification, are permitted provided that the following conditions
        !             7:  * are met:
        !             8:  * 1. Redistributions of source code must retain the above copyright
        !             9:  *    notice, this list of conditions and the following disclaimer.
        !            10:  * 2. Redistributions in binary form must reproduce the above copyright
        !            11:  *    notice, this list of conditions and the following disclaimer in the
        !            12:  *    documentation and/or other materials provided with the distribution.
        !            13:  * 3. The name of the author may not be used to endorse or promote products
        !            14:  *    derived from this software without specific prior written permission.
        !            15:  *
        !            16:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
        !            17:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
        !            18:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
        !            19:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
        !            20:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
        !            21:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
        !            22:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
        !            23:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
        !            24:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
        !            25:  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
        !            26:  */
        !            27:
        !            28: /* I2S registers */
        !            29: #define I2S_INT                0x00
        !            30: #define I2S_FORMAT     0x10
        !            31: #define I2S_FRAMECOUNT 0x40
        !            32: #define I2S_FRAMEMATCH 0x50
        !            33: #define I2S_WORDSIZE   0x60
        !            34:
        !            35: /* I2S_INT register definitions */
        !            36: #define I2SClockOffset         0x3c
        !            37: #define I2S_INT_CLKSTOPPEND    0x01000000
        !            38:
        !            39: /* FCR(0x3c) bits */
        !            40: #define I2S0CLKEN      0x1000
        !            41: #define I2S0EN         0x2000
        !            42: #define I2S1CLKEN      0x080000
        !            43: #define I2S1EN         0x100000
        !            44:
        !            45:
        !            46: #define CLKSRC_49MHz   0x80000000      /* Use 49152000Hz Osc. */
        !            47: #define CLKSRC_45MHz   0x40000000      /* Use 45158400Hz Osc. */
        !            48: #define CLKSRC_18MHz   0x00000000      /* Use 18432000Hz Osc. */
        !            49: #define CLKSRC_VS      0x01fa0000      /* Magic value of xserve vu-meter */
        !            50: #define MCLK_DIV       0x1f000000      /* MCLK = SRC / DIV */
        !            51: #define  MCLK_DIV1     0x14000000      /*  MCLK = SRC */
        !            52: #define  MCLK_DIV3     0x13000000      /*  MCLK = SRC / 3 */
        !            53: #define  MCLK_DIV5     0x12000000      /*  MCLK = SRC / 5 */
        !            54: #define SCLK_DIV       0x00f00000      /* SCLK = MCLK / DIV */
        !            55: #define  SCLK_DIV1     0x00800000
        !            56: #define  SCLK_DIV3     0x00900000
        !            57: #define SCLK_MASTER    0x00080000      /* Master mode */
        !            58: #define SCLK_SLAVE     0x00000000      /* Slave mode */
        !            59: #define SERIAL_FORMAT  0x00070000
        !            60: #define  SERIAL_SONY   0x00000000
        !            61: #define  SERIAL_64x    0x00010000
        !            62: #define  SERIAL_32x    0x00020000
        !            63: #define  SERIAL_DAV    0x00040000
        !            64: #define  SERIAL_SILICON        0x00050000