Annotation of sys/arch/mac68k/mac68k/intr.c, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: intr.c,v 1.10 2007/07/29 21:24:05 miod Exp $ */
! 2: /* $NetBSD: intr.c,v 1.2 1998/08/25 04:03:56 scottr Exp $ */
! 3:
! 4: /*-
! 5: * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
! 6: * All rights reserved.
! 7: *
! 8: * This code is derived from software contributed to The NetBSD Foundation
! 9: * by Adam Glass, Gordon W. Ross, and Jason R. Thorpe.
! 10: *
! 11: * Redistribution and use in source and binary forms, with or without
! 12: * modification, are permitted provided that the following conditions
! 13: * are met:
! 14: * 1. Redistributions of source code must retain the above copyright
! 15: * notice, this list of conditions and the following disclaimer.
! 16: * 2. Redistributions in binary form must reproduce the above copyright
! 17: * notice, this list of conditions and the following disclaimer in the
! 18: * documentation and/or other materials provided with the distribution.
! 19: * 3. All advertising materials mentioning features or use of this software
! 20: * must display the following acknowledgement:
! 21: * This product includes software developed by the NetBSD
! 22: * Foundation, Inc. and its contributors.
! 23: * 4. Neither the name of The NetBSD Foundation nor the names of its
! 24: * contributors may be used to endorse or promote products derived
! 25: * from this software without specific prior written permission.
! 26: *
! 27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
! 31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 37: * POSSIBILITY OF SUCH DAMAGE.
! 38: */
! 39:
! 40: /*
! 41: * Link and dispatch interrupts.
! 42: */
! 43:
! 44: #include <sys/param.h>
! 45: #include <sys/systm.h>
! 46: #include <sys/malloc.h>
! 47: #include <sys/vmmeter.h>
! 48: #include <sys/evcount.h>
! 49:
! 50: #include <uvm/uvm_extern.h>
! 51:
! 52: #include <net/netisr.h>
! 53:
! 54: #include <machine/atomic.h>
! 55: #include <machine/cpu.h>
! 56: #include <machine/intr.h>
! 57:
! 58: #define NISR 8
! 59: #define ISRLOC 0x18
! 60:
! 61: void intr_init(void);
! 62: void netintr(void);
! 63:
! 64: #ifdef DEBUG
! 65: int intr_debug = 0;
! 66: #endif
! 67:
! 68: /*
! 69: * Some of the below are not used yet, but might be used someday on the
! 70: * Q700/900/950 where the interrupt controller may be reprogrammed to
! 71: * interrupt on different levels as listed in locore.s
! 72: */
! 73: u_short mac68k_ttyipl;
! 74: u_short mac68k_netipl;
! 75: u_short mac68k_vmipl;
! 76: u_short mac68k_clockipl;
! 77: u_short mac68k_statclockipl;
! 78:
! 79: struct intrhand intrs[NISR];
! 80:
! 81: void intr_computeipl(void);
! 82:
! 83: void
! 84: intr_init()
! 85: {
! 86: /* Standard spl(9) interrupt priorities */
! 87: mac68k_ttyipl = (PSL_S | PSL_IPL1);
! 88:
! 89: if (mac68k_machine.aux_interrupts) {
! 90: mac68k_netipl = (PSL_S | PSL_IPL3);
! 91: mac68k_vmipl = (PSL_S | PSL_IPL6);
! 92: } else {
! 93: if (current_mac_model->class == MACH_CLASSAV)
! 94: mac68k_netipl = (PSL_S | PSL_IPL4);
! 95: else if (mac68k_machine.sonic)
! 96: mac68k_netipl = (PSL_S | PSL_IPL3);
! 97: else
! 98: mac68k_netipl = (PSL_S | PSL_IPL2);
! 99:
! 100: mac68k_vmipl = (PSL_S | PSL_IPL2);
! 101: }
! 102:
! 103: mac68k_clockipl = mac68k_statclockipl = mac68k_vmipl;
! 104: intr_computeipl();
! 105: }
! 106:
! 107: /*
! 108: * Compute the interrupt levels for the spl*()
! 109: * calls. This doesn't have to be fast.
! 110: */
! 111: void
! 112: intr_computeipl()
! 113: {
! 114: /*
! 115: * Enforce `bio <= net <= tty <= imp <= statclock <= clock'
! 116: * as defined in spl(9)
! 117: */
! 118: if ((PSL_S | PSL_IPL2) > mac68k_netipl)
! 119: mac68k_netipl = (PSL_S | PSL_IPL2);
! 120:
! 121: if (mac68k_netipl > mac68k_ttyipl)
! 122: mac68k_ttyipl = mac68k_netipl;
! 123:
! 124: if (mac68k_ttyipl > mac68k_vmipl)
! 125: mac68k_vmipl = mac68k_ttyipl;
! 126:
! 127: if (mac68k_vmipl > mac68k_statclockipl)
! 128: mac68k_statclockipl = mac68k_vmipl;
! 129:
! 130: if (mac68k_statclockipl > mac68k_clockipl)
! 131: mac68k_clockipl = mac68k_statclockipl;
! 132: }
! 133:
! 134: /*
! 135: * Establish an autovectored interrupt handler.
! 136: * Called by driver attach functions.
! 137: */
! 138: void
! 139: intr_establish(int (*func)(void *), void *arg, int ipl, const char *name)
! 140: {
! 141: struct intrhand *ih;
! 142:
! 143: #ifdef DIAGNOSTIC
! 144: if (ipl < 0 || ipl >= NISR)
! 145: panic("intr_establish: bad ipl %d", ipl);
! 146: #endif
! 147:
! 148: ih = &intrs[ipl];
! 149:
! 150: #ifdef DIAGNOSTIC
! 151: if (ih->ih_fn != NULL)
! 152: panic("intr_establish: attempt to share ipl %d", ipl);
! 153: #endif
! 154:
! 155: ih->ih_fn = func;
! 156: ih->ih_arg = arg;
! 157: ih->ih_ipl = ipl;
! 158: evcount_attach(&ih->ih_count, name, (void *)&ih->ih_ipl, &evcount_intr);
! 159: }
! 160:
! 161: /*
! 162: * Disestablish an interrupt handler.
! 163: */
! 164: void
! 165: intr_disestablish(int ipl)
! 166: {
! 167: struct intrhand *ih;
! 168:
! 169: #ifdef DIAGNOSTIC
! 170: if (ipl < 0 || ipl >= NISR)
! 171: panic("intr_disestablish: bad ipl %d", ipl);
! 172: #endif
! 173:
! 174: ih = &intrs[ipl];
! 175:
! 176: #ifdef DIAGNOSTIC
! 177: if (ih->ih_fn == NULL)
! 178: panic("intr_disestablish: no vector on ipl %d", ipl);
! 179: #endif
! 180:
! 181: ih->ih_fn = NULL;
! 182: evcount_detach(&ih->ih_count);
! 183: }
! 184:
! 185: /*
! 186: * This is the dispatcher called by the low-level
! 187: * assembly language interrupt routine.
! 188: */
! 189: void
! 190: intr_dispatch(int evec) /* format | vector offset */
! 191: {
! 192: struct intrhand *ih;
! 193: int ipl, vec;
! 194:
! 195: vec = (evec & 0x0fff) >> 2;
! 196: ipl = vec - ISRLOC;
! 197: #ifdef DIAGNOSTIC
! 198: if (ipl < 0 || ipl >= NISR)
! 199: panic("intr_dispatch: bad vec 0x%x", vec);
! 200: #endif
! 201:
! 202: uvmexp.intrs++;
! 203: ih = &intrs[ipl];
! 204: if (ih->ih_fn != NULL) {
! 205: if ((*ih->ih_fn)(ih->ih_arg) != 0)
! 206: ih->ih_count.ec_count++;
! 207: } else {
! 208: #if 0
! 209: printf("spurious interrupt, ipl %d\n", ipl);
! 210: #endif
! 211: }
! 212: }
! 213:
! 214: int netisr;
! 215:
! 216: void
! 217: netintr()
! 218: {
! 219: int isr;
! 220:
! 221: while ((isr = netisr) != 0) {
! 222: atomic_clearbits_int(&netisr, isr);
! 223:
! 224: #define DONETISR(bit, fn) \
! 225: do { \
! 226: if (isr & (1 << bit)) \
! 227: (fn)(); \
! 228: } while (0)
! 229:
! 230: #include <net/netisr_dispatch.h>
! 231:
! 232: #undef DONETISR
! 233: }
! 234: }
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