Annotation of sys/arch/mac68k/include/z8530var.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: z8530var.h,v 1.7 2004/11/25 18:32:10 miod Exp $ */
2: /* $NetBSD: z8530var.h,v 1.2 1996/06/07 10:27:19 briggs Exp $ */
3:
4: /*
5: * Copyright (c) 1994 Gordon W. Ross
6: * Copyright (c) 1992, 1993
7: * The Regents of the University of California. All rights reserved.
8: *
9: * This software was developed by the Computer Systems Engineering group
10: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
11: * contributed to Berkeley.
12: *
13: * All advertising materials mentioning features or use of this software
14: * must display the following acknowledgement:
15: * This product includes software developed by the University of
16: * California, Lawrence Berkeley Laboratory.
17: *
18: * Redistribution and use in source and binary forms, with or without
19: * modification, are permitted provided that the following conditions
20: * are met:
21: * 1. Redistributions of source code must retain the above copyright
22: * notice, this list of conditions and the following disclaimer.
23: * 2. Redistributions in binary form must reproduce the above copyright
24: * notice, this list of conditions and the following disclaimer in the
25: * documentation and/or other materials provided with the distribution.
26: * 3. Neither the name of the University nor the names of its contributors
27: * may be used to endorse or promote products derived from this software
28: * without specific prior written permission.
29: *
30: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40: * SUCH DAMAGE.
41: *
42: * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
43: */
44:
45: #ifndef _MAC68K_Z8530VAR_H_
46: #define _MAC68K_Z8530VAR_H_
47:
48: #ifdef _KERNEL
49: #include <mac68k/dev/z8530sc.h>
50:
51: /*
52: * Clock source info structure, added here so xzs_chanstate works
53: */
54: struct zsclksrc {
55: long clk; /* clock rate, in MHz, present on signal line */
56: int flags; /* Specifies how this source can be used
57: (RTxC divided, RTxC BRG, PCLK BRG, TRxC divided) and also if the source is "external" and if it
58: is changeable (by an ioctl ex.). The
59: source usage flags are used by the tty
60: child. The other bits tell zsloadchannelregs
61: if it should call an md signal source
62: changing routine. ZSC_VARIABLE says if
63: an ioctl should be able to change the
64: clock rate.*/
65: };
66: #define ZSC_PCLK 0x01
67: #define ZSC_RTXBRG 0x02
68: #define ZSC_RTXDIV 0x04
69: #define ZSC_TRXDIV 0x08
70: #define ZSC_VARIABLE 0x40
71: #define ZSC_EXTERN 0x80
72:
73: #define ZSC_BRG 0x03
74: #define ZSC_DIV 0x0c
75:
76: /*
77: * These are the machine-dependent (extended) variants of
78: * struct zs_chanstate and struct zsc_softc
79: */
80: struct xzs_chanstate {
81: /* machine-independent part (First!)*/
82: struct zs_chanstate xzs_cs;
83: /* machine-dependent extensions */
84: int cs_hwflags;
85: int cs_chip; /* type of chip */
86: /* Clock source info... */
87: int cs_clock_count; /* how many signal sources available */
88: struct zsclksrc cs_clocks[4]; /* info on available signal sources */
89: long cs_cclk_flag; /* flag for current clock source */
90: long cs_pclk_flag; /* flag for pending clock source */
91: int cs_csource; /* current source # */
92: int cs_psource; /* pending source # */
93: };
94:
95: struct zsc_softc {
96: struct device zsc_dev; /* required first: base device */
97: struct zs_chanstate *zsc_cs[2]; /* channel A and B soft state */
98: /* Machine-dependent part follows... */
99: struct xzs_chanstate xzsc_xcs_store[2];
100: };
101:
102: /*
103: * Functions to read and write individual registers in a channel.
104: * The ZS chip requires a 1.6 uSec. recovery time between accesses,
105: * and the Sun3 hardware does NOT take care of this for you.
106: * MacII hardware DOES dake care of the delay for us.
107: */
108:
109: u_char zs_read_reg(struct zs_chanstate *cs, u_char reg);
110: u_char zs_read_csr(struct zs_chanstate *cs);
111: u_char zs_read_data(struct zs_chanstate *cs);
112:
113: void zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val);
114: void zs_write_csr(struct zs_chanstate *cs, u_char val);
115: void zs_write_data(struct zs_chanstate *cs, u_char val);
116: #endif /* _KERNEL */
117:
118: /* XXX - Could define splzs() here instead of in psl.h */
119:
120: /* Hook for MD ioctl support */
121: int zsmdioctl (struct zs_chanstate *cs, u_long cmd, caddr_t data);
122: /* XXX - This is a bit gross... */
123: #define ZS_MD_IOCTL zsmdioctl(cs, cmd, data)
124:
125: /* Callback for "external" clock sources */
126: void zsmd_setclock(struct zs_chanstate *cs);
127: #define ZS_MD_SETCLK(cs) zsmd_setclock(cs)
128: #endif /* _KERNEL */
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