Annotation of sys/arch/mac68k/include/viareg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: viareg.h,v 1.18 2006/01/13 21:02:01 miod Exp $ */
2: /* $NetBSD: viareg.h,v 1.6 1997/02/28 07:41:41 scottr Exp $ */
3:
4: /*-
5: * Copyright (C) 1993 Allen K. Briggs, Chris P. Caputo,
6: * Michael L. Finch, Bradley A. Grantham, and
7: * Lawrence A. Kesteloot
8: * All rights reserved.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by the Alice Group.
21: * 4. The names of the Alice Group or any of its members may not be used
22: * to endorse or promote products derived from this software without
23: * specific prior written permission.
24: *
25: * THIS SOFTWARE IS PROVIDED BY THE ALICE GROUP ``AS IS'' AND ANY EXPRESS OR
26: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28: * IN NO EVENT SHALL THE ALICE GROUP BE LIABLE FOR ANY DIRECT, INDIRECT,
29: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34: * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35: *
36: */
37:
38: /*
39: * Prototype VIA control definitions
40: */
41: #ifndef _MAC68K_VIAREG_H_
42: #define _MAC68K_VIAREG_H_
43:
44: /* VIA1 data register A */
45: #define DA1I_vSCCWrReq 0x80
46: #define DA1O_vPage2 0x40
47: #define DA1I_CPU_ID1 0x40
48: #define DA1O_vHeadSel 0x20
49: #define DA1O_vOverlay 0x10
50: #define DA1O_vSync 0x08
51: #define DA1O_RESERVED2 0x04
52: #define DA1O_RESERVED1 0x02
53: #define DA1O_RESERVED0 0x01
54:
55: /* VIA1 data register B */
56: #define DB1I_Par_Err 0x80
57: #define DB1O_vSndEnb 0x80
58: #define DB1O_Par_Enb 0x40
59: #define DB1O_AuxIntEnb 0x40 /* 0 = enabled, 1 = disabled */
60: #define DB1O_vFDesk2 0x20
61: #define DB1O_vFDesk1 0x10
62: #define DB1I_vFDBInt 0x08
63: #define DB1O_rTCEnb 0x04
64: #define DB1O_rTCCLK 0x02
65: #define DB1O_rTCData 0x01
66: #define DB1I_rTCData 0x01
67:
68: /* VIA2 data register A */
69: #define DA2O_v2Ram1 0x80
70: #define DA2O_v2Ram0 0x40
71: #define DA2I_v2IRQ0 0x40
72: #define DA2I_v2IRQE 0x20
73: #define DA2I_v2IRQD 0x10
74: #define DA2I_v2IRQC 0x08
75: #define DA2I_v2IRQB 0x04
76: #define DA2I_v2IRQA 0x02
77: #define DA2I_v2IRQ9 0x01
78:
79: /* VIA2 data register B */
80: #define DB2O_v2VBL 0x80
81: #define DB2O_Par_Test 0x80
82: #define DB2I_v2SNDEXT 0x40
83: #define DB2I_v2TM0A 0x20
84: #define DB2I_v2TM1A 0x10
85: #define DB2I_vFC3 0x08
86: #define DB2O_vFC3 0x08
87: #define DB2O_v2PowerOff 0x04
88: #define DB2O_v2BusLk 0x02
89: #define DB2O_vCDis 0x01
90: #define DB2O_CEnable 0x01
91:
92: /*
93: * VIA1 interrupts
94: */
95: #define VIA1_T1 6
96: #define VIA1_T2 5
97: #define VIA1_ADBCLK 4
98: #define VIA1_ADBDATA 3
99: #define VIA1_ADBRDY 2
100: #define VIA1_VBLNK 1
101: #define VIA1_ONESEC 0
102:
103: /* VIA1 interrupt bits */
104: #define V1IF_IRQ 0x80
105: #define V1IF_T1 (1 << VIA1_T1)
106: #define V1IF_T2 (1 << VIA1_T2)
107: #define V1IF_ADBCLK (1 << VIA1_ADBCLK)
108: #define V1IF_ADBDATA (1 << VIA1_ADBDATA)
109: #define V1IF_ADBRDY (1 << VIA1_ADBRDY)
110: #define V1IF_VBLNK (1 << VIA1_VBLNK)
111: #define V1IF_ONESEC (1 << VIA1_ONESEC)
112:
113: /*
114: * VIA2 interrupts
115: */
116: #define VIA2_T1 6
117: #define VIA2_T2 5
118: #define VIA2_ASC 4
119: #define VIA2_SCSIIRQ 3
120: #define VIA2_EXPIRQ 2
121: #define VIA2_SLOTINT 1
122: #define VIA2_SCSIDRQ 0
123:
124: /* VIA2 interrupt bits */
125: #define V2IF_IRQ 0x80
126: #define V2IF_T1 (1 << VIA2_T1)
127: #define V2IF_T2 (1 << VIA2_T2)
128: #define V2IF_ASC (1 << VIA2_ASC)
129: #define V2IF_SCSIIRQ (1 << VIA2_SCSIIRQ)
130: #define V2IF_EXPIRQ (1 << VIA2_EXPIRQ)
131: #define V2IF_SLOTINT (1 << VIA2_SLOTINT)
132: #define V2IF_SCSIDRQ (1 << VIA2_SCSIDRQ)
133:
134: #define VIA1_INTS (V1IF_T1 | V1IF_ADBRDY)
135: #define VIA2_INTS (V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \
136: V2IF_SCSIDRQ)
137:
138: #define RBV_INTS (V2IF_T1 | V2IF_ASC | V2IF_SCSIIRQ | V2IF_SLOTINT | \
139: V2IF_SCSIDRQ | V1IF_ADBRDY)
140:
141: #define ACR_T1LATCH 0x40
142:
143: extern volatile unsigned char *Via1Base;
144: extern volatile unsigned char *Via2Base; /* init in VIA_Initialize */
145: #define VIA1_addr Via1Base /* at PA 0x50f00000 */
146:
147: #define VIA2OFF 1 /* VIA2 addr = VIA1_addr + 0x2000 */
148: #define RBVOFF 0x13 /* RBV addr = VIA1_addr + 0x26000 */
149: #define OSSOFF 0xd /* OSS addr = VIA1_addr + 0x1A000 */
150:
151: #define VIA1 0
152: extern int VIA2;
153:
154: /* VIA interface registers */
155: #define vBufA 0x1e00 /* register A */
156: #define vBufB 0 /* register B */
157: #define vDirA 0x0600 /* data direction register */
158: #define vDirB 0x0400 /* data direction register */
159: #define vT1C 0x0800
160: #define vT1CH 0x0a00
161: #define vT1L 0x0c00
162: #define vT1LH 0x0e00
163: #define vT2C 0x1000
164: #define vT2CH 0x1200
165: #define vSR 0x1400 /* shift register */
166: #define vACR 0x1600 /* aux control register */
167: #define vPCR 0x1800 /* peripheral control register */
168: #define vIFR 0x1a00 /* interrupt flag register */
169: #define vIER 0x1c00 /* interrupt enable register */
170:
171: /* RBV interface registers */
172: #define rBufB 0 /* register B */
173: #define rBufA 2 /* register A */
174: #define rIFR 0x3 /* interrupt flag register (writes?) */
175: #define rIER 0x13 /* interrupt enable register */
176: #define rMonitor 0x10 /* Monitor type */
177: #define rSlotInt 0x12 /* Slot interrupt */
178:
179: /* RBV monitor type flags and masks */
180: #define RBVDepthMask 0x07 /* Depth in bits */
181: #define RBVMonitorMask 0x38 /* Type numbers */
182: #define RBVOff 0x40 /* Monitor turned off */
183: #define RBVMonIDBWP 0x08 /* 15 inch BW portrait */
184: #define RBVMonIDRGB12 0x10 /* 12 inch color */
185: #define RBVMonIDRGB15 0x28 /* 15 inch RGB */
186: #define RBVMonIDStd 0x30 /* 12 inch BW or 13 inch color */
187: #define RBVMonIDNone 0x38 /* No monitor connected */
188:
189: /* OSS registers */
190: #define OSS_IFR 0x202
191: #define OSS_PENDING_IRQ (*(volatile u_short *)(Via2Base + (OSS_IFR)))
192:
193: #define OSS_oRCR 0x204
194: #define OSS_POWEROFF 0x80
195:
196: #define via_reg(v, r) (*(Via1Base+(v)*0x2000+(r)))
197: #define via2_reg(r) (*(Via2Base+(r)))
198:
199: #define vDirA_ADBState 0x30
200:
201: #ifdef _KERNEL
202: /* VIA2 interrupts may be shared */
203: struct via2hand {
204: SLIST_ENTRY(via2hand) v2h_link;
205: struct intrhand v2h_ih;
206: #define vh_fn v2h_ih.ih_fn
207: #define vh_arg v2h_ih.ih_arg
208: #define vh_ipl v2h_ih.ih_ipl
209: #define vh_count v2h_ih.ih_count
210: };
211: typedef SLIST_HEAD(, via2hand) via2hand_t;
212:
213: void via_init(void);
214: void via_powerdown(void);
215: void via_set_modem(int);
216: void add_nubus_intr(int, int (*)(void *), void *, const char *);
217: void enable_nubus_intr(void);
218: void via1_register_irq(int, int (*)(void *), void *, const char *);
219: int via2_register_irq(struct via2hand *, const char *);
220: #endif /* _KERNEL */
221:
222: #endif /* _MAC68K_VIAREG_H_ */
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