Annotation of sys/arch/mac68k/include/intr.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: intr.h,v 1.17 2007/07/29 21:24:05 miod Exp $ */
! 2: /* $NetBSD: intr.h,v 1.9 1998/08/12 06:58:42 scottr Exp $ */
! 3:
! 4: /*
! 5: * Copyright (C) 1997 Scott Reynolds
! 6: * All rights reserved.
! 7: *
! 8: * Redistribution and use in source and binary forms, with or without
! 9: * modification, are permitted provided that the following conditions
! 10: * are met:
! 11: * 1. Redistributions of source code must retain the above copyright
! 12: * notice, this list of conditions and the following disclaimer.
! 13: * 2. Redistributions in binary form must reproduce the above copyright
! 14: * notice, this list of conditions and the following disclaimer in the
! 15: * documentation and/or other materials provided with the distribution.
! 16: * 3. The name of the author may not be used to endorse or promote products
! 17: * derived from this software without specific prior written permission.
! 18: *
! 19: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 20: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
! 21: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
! 22: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
! 23: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
! 24: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
! 25: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
! 26: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
! 27: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
! 28: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! 29: */
! 30:
! 31: #ifndef _MAC68K_INTR_H_
! 32: #define _MAC68K_INTR_H_
! 33:
! 34: #include <machine/psl.h>
! 35:
! 36: #ifdef _KERNEL
! 37:
! 38: /*
! 39: * splnet must block hardware network interrupts
! 40: * splvm must be > spltty
! 41: */
! 42: extern u_short mac68k_ttyipl;
! 43: extern u_short mac68k_netipl;
! 44: extern u_short mac68k_vmipl;
! 45: extern u_short mac68k_audioipl;
! 46: extern u_short mac68k_clockipl;
! 47: extern u_short mac68k_statclockipl;
! 48:
! 49: /*
! 50: * Interrupt "levels". These are a more abstract representation
! 51: * of interrupt levels, and do not have the same meaning as m68k
! 52: * CPU interrupt levels. They serve two purposes:
! 53: *
! 54: * - properly order ISRs in the list for that CPU ipl
! 55: * - compute CPU PSL values for the spl*() calls.
! 56: */
! 57: #define IPL_NONE 0
! 58: #define IPL_SOFTNET 1
! 59: #define IPL_SOFTCLOCK 1
! 60: #define IPL_BIO 2
! 61: #define IPL_NET PSLTOIPL(mac68k_netipl)
! 62: #define IPL_TTY PSLTOIPL(mac68k_ttyipl)
! 63: #define IPL_CLOCK PSLTOIPL(mac68k_clockipl)
! 64: #define IPL_STATCLOCK PSLTOIPL(mac68k_statclockipl)
! 65: #define IPL_HIGH 7
! 66:
! 67: /*
! 68: * These should be used for:
! 69: * 1) ensuring mutual exclusion (why use processor level?)
! 70: * 2) allowing faster devices to take priority
! 71: *
! 72: * Note that on the Mac, most things are masked at spl1, almost
! 73: * everything at spl2, and everything but the panic switch and
! 74: * power at spl4.
! 75: */
! 76: #define splsoft() _splraise(PSL_S | PSL_IPL1)
! 77: #define splsoftclock() splsoft()
! 78: #define splsoftnet() splsoft()
! 79: #define spltty() _splraise(mac68k_ttyipl)
! 80: #define splbio() _splraise(PSL_S | PSL_IPL2)
! 81: #define splnet() _splraise(mac68k_netipl)
! 82: #define splvm() _splraise(mac68k_vmipl)
! 83: #define splaudio() _splraise(mac68k_audioipl)
! 84: #define splclock() _splraise(mac68k_clockipl)
! 85: #define splstatclock() _splraise(mac68k_statclockipl)
! 86: #define splserial() _splraise(PSL_S | PSL_IPL4)
! 87: #define splhigh() _spl(PSL_S | PSL_IPL7)
! 88: #define splsched() splhigh()
! 89:
! 90: /* These spl calls are _not_ to be used by machine-independent code. */
! 91: #define spladb() splhigh()
! 92: #define splzs() splserial()
! 93:
! 94: /* watch out for side effects */
! 95: #define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0())
! 96:
! 97: /*
! 98: * simulated software interrupt register
! 99: */
! 100: extern volatile u_int8_t ssir;
! 101:
! 102: #define SIR_NET 0x01
! 103: #define SIR_CLOCK 0x02
! 104: #define SIR_SERIAL 0x04
! 105: #define SIR_ADB 0x08
! 106:
! 107: #define siron(mask) \
! 108: __asm __volatile ( "orb %1,%0" : "=m" (ssir) : "i" (mask))
! 109: #define siroff(mask) \
! 110: __asm __volatile ( "andb %1,%0" : "=m" (ssir) : "ir" (~(mask)))
! 111:
! 112: #define setsoftnet() siron(SIR_NET)
! 113: #define setsoftclock() siron(SIR_CLOCK)
! 114: #define setsoftserial() siron(SIR_SERIAL)
! 115: #define setsoftadb() siron(SIR_ADB)
! 116:
! 117: /* intr.c */
! 118: void intr_init(void);
! 119: void intr_establish(int (*)(void *), void *, int, const char *);
! 120: void intr_disestablish(int);
! 121: void intr_dispatch(int);
! 122:
! 123: /* locore.s */
! 124: int spl0(void);
! 125:
! 126: /*
! 127: * Interrupt handler.
! 128: * There is no support for shared interrupts at the moment.
! 129: */
! 130: #include <sys/evcount.h>
! 131: struct intrhand {
! 132: int (*ih_fn)(void *);
! 133: void *ih_arg;
! 134: int ih_ipl;
! 135: struct evcount ih_count;
! 136: };
! 137: #endif /* _KERNEL */
! 138:
! 139: #endif /* _MAC68K_INTR_H_ */
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