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Annotation of sys/arch/m88k/include/proc.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: proc.h,v 1.4 2005/11/28 22:21:15 miod Exp $ */
                      2: /*
                      3:  * Copyright (c) 1992, 1993
                      4:  *     The Regents of the University of California.  All rights reserved.
                      5:  *
                      6:  * This software was developed by the Computer Systems Engineering group
                      7:  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
                      8:  * contributed to Berkeley.
                      9:  *
                     10:  * All advertising materials mentioning features or use of this software
                     11:  * must display the following acknowledgement:
                     12:  *     This product includes software developed by the University of
                     13:  *     California, Lawrence Berkeley Laboratory.
                     14:  *
                     15:  * Redistribution and use in source and binary forms, with or without
                     16:  * modification, are permitted provided that the following conditions
                     17:  * are met:
                     18:  * 1. Redistributions of source code must retain the above copyright
                     19:  *    notice, this list of conditions and the following disclaimer.
                     20:  * 2. Redistributions in binary form must reproduce the above copyright
                     21:  *    notice, this list of conditions and the following disclaimer in the
                     22:  *    documentation and/or other materials provided with the distribution.
                     23:  * 3. Neither the name of the University nor the names of its contributors
                     24:  *    may be used to endorse or promote products derived from this software
                     25:  *    without specific prior written permission.
                     26:  *
                     27:  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
                     28:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
                     29:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
                     30:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
                     31:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
                     32:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
                     33:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
                     34:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
                     35:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
                     36:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
                     37:  * SUCH DAMAGE.
                     38:  *
                     39:  *     @(#)proc.h      8.1 (Berkeley) 6/11/93
                     40:  *
                     41:  * from: Header: proc.h,v 1.6 92/11/26 02:04:41 torek Exp  (LBL)
                     42:  */
                     43:
                     44: #ifndef __MACHINE_PROC_H__
                     45: #define __MACHINE_PROC_H__
                     46:
                     47: struct trapframe;
                     48:
                     49: /*
                     50:  * Machine-dependent part of the proc structure for mvme88k.
                     51:  */
                     52: struct mdproc {
                     53:        struct trapframe *md_tf;        /* trap/syscall registers */
                     54:        volatile int md_astpending;     /* AST pending for this process */
                     55:
                     56:         /*
                     57:          * Single stepping is done by moving two breakpoints in the
                     58:          * process' code:
                     59:          * - one breakpoint for regular flow (i.e. the immediately following
                     60:          *   instruction)
                     61:          * - one breakpoint for potential branches.
                     62:          * Using two breakpoints allows us to not worry about the delay slots.
                     63:          */
                     64:        vaddr_t md_bp0va;
                     65:        u_int   md_bp0save;
                     66:        vaddr_t md_bp1va;
                     67:        u_int   md_bp1save;
                     68: };
                     69:
                     70: #endif /* __MACHINE_PROC_H__ */